9–84
Chapter 9: Configuration, Design Security, and Remote System Upgrades in the Cyclone III Device Family
Remote System Upgrade
Table 9–29 lists the contents of the previous state register 1 and previous state register
2 in the status register when the MSEL pin setting is set to the AS or AP scheme. The
status register bit in Table 9–29 shows the bit positions in a 31-bit register. The
previous state register 1 and previous state register 2 have the same bit definitions.
The previous state register 1 reflects the current application configuration and the
previous state register 2 reflects the previous application configuration.
Table 9–29. Remote System Upgrade Previous State Register 1 and Previous State Register 2
(1)
Contents in Status Register
Status Register Bit
Definition
nCONFIGsource
Description
30
29
28
27
One-hot, active-high field that
describes the reconfiguration source
that caused the Cyclone III device
family to leave the previous application
configuration. If there is a tie, the
higher bit order indicates precedence.
For example, if nCONFIGand remote
system upgrade nCONFIGreach the
reconfiguration state machine at the
same time, the nCONFIGprecedes the
CRC error source
nSTATUSsource
User watchdog timer source
Remote system upgrade nCONFIG
source
26
remote system upgrade nCONFIG
.
The state of the master state machine
during reconfiguration causes the
Cyclone III device family to leave the
previous application configuration.
25:24
Master state machine current state
Boot address
The address used by the configuration
scheme to load the previous
application configuration.
23:0
Note to Table 9–29:
(1) The MSEL pin settings are in the AS configuration scheme.
If a capture is inappropriately done, for example, capturing a previous state before the
system has entered remote update application configuration for the first time, a value
will output from the shift register to indicate that the capture was incorrectly called.
Remote System Upgrade State Machine
The remote system upgrade control and update registers have identical bit
definitions, but serve different roles (Table 9–26 on page 9–81). While both registers
can only be updated when the device is loaded with a factory configuration image,
the update register writes are controlled by the user logic, and the control register
writes are controlled by the remote system upgrade state machine.
In factory configurations, the user logic should send the option bits (Cd_earlyand
Osc_int), the configuration address, and watchdog timer settings for the next
application configuration bit to the update register. When the logic array
configuration reset (RU_nCONFIG) goes high, the remote system upgrade state machine
updates the control register with the contents of the update register and starts system
reconfiguration from the new application page.
Cyclone III Device Handbook
Volume 1
August 2012 Altera Corporation