Chapter 4: Embedded Multipliers in the Cyclone III Device Family
4–5
Operational Modes
Table 4–3 lists the sign of the multiplication results for the various operand sign
representations. The results of the multiplication are signed if any one of the operands
is a signed value.
Table 4–3. Multiplier Sign Representation
Data A
Data B
Result
signa Value
Unsigned
Unsigned
Signed
Logic Level
Low
signb Value
Unsigned
Signed
Logic Level
Low
Unsigned
Signed
Signed
Signed
Low
High
High
Unsigned
Signed
Low
Signed
High
High
Each embedded multiplier block has only one signaand one signbsignal to control
the sign representation of the input data to the block. If the embedded multiplier
block has two 9 × 9 multipliers, the Data Ainput of both multipliers share the same
signasignal, and the Data Binput of both multipliers share the same signbsignal.
You can dynamically change the signaand signbsignals to modify the sign
representation of the input operands at run time. You can send the signaand signb
signals through a dedicated input register. The multiplier offers full precision,
regardless of the sign representation.
1
When the signaand signbsignals are unused, the Quartus II software sets the
multiplier to perform unsigned multiplication by default.
Output Registers
You can register the embedded multiplier output using output registers in either
18- or 36-bit sections, depending on the operational mode of the multiplier. The
following control signals are available for each output register in the embedded
multiplier:
■
■
■
clock
clock enable
asynchronous clear
All input and output registers in a single embedded multiplier are fed by the same
clock, clock enable, and asynchronous clear signals.
Operational Modes
You can use an embedded multiplier block in one of two operational modes,
depending on the application needs:
■
One 18-bit × 18-bit multiplier
■
Up to two 9-bit × 9-bit independent multipliers
December 2011 Altera Corporation
Cyclone III Device Handbook
Volume 1
ALTERA [ ALTERA CORPORATION ]
