Chapter 4: Embedded Multipliers in the Cyclone III Device Family
4–3
Architecture
In addition to the embedded multipliers in the Cyclone III device family, you can
implement soft multipliers by using the M9K memory blocks as look-up tables
(LUTs). The LUTs contain partial results from the multiplication of input data with
coefficients that implement variable depth and width high-performance soft
multipliers for low-cost, high-volume DSP applications. The availability of soft
multipliers increases the number of available multipliers in the device.
Table 4–2 lists the total number of multipliers available in the Cyclone III device
family using embedded multipliers and soft multipliers.
Table 4–2. Number of Multipliers in the Cyclone III Device Family
Soft Multipliers
(2)
Device Family
Device
Embedded Multipliers
Total Multipliers
(1)
(16 × 16)
EP3C5
EP3C10
23
23
—
46
23
69
EP3C16
56
56
112
132
252
416
549
720
533
759
986
1287
EP3C25
66
66
Cyclone III
EP3C40
126
156
244
288
200
276
320
396
126
260
305
432
333
483
666
891
EP3C55
EP3C80
EP3C120
EP3CLS70
EP3CLS100
EP3CLS150
EP3CLS200
Cyclone III LS
Notes to Table 4–2:
(1) Soft multipliers are implemented in sum of multiplication mode. M9K memory blocks are configured with 18-bit data widths to support 16-bit
coefficients. The sum of the coefficients requires 18-bits of resolution to account for overflow.
(2) The total number of multipliers may vary, depending on the multiplier mode you use.
f
f
For more information about M9K memory blocks of the Cyclone III device family,
refer to the Memory Blocks in the Cyclone III Device Family chapter.
For more information about soft multipliers, refer to the Implementing Multipliers in
FPGA Devices application note.
Architecture
Each embedded multiplier consists of the following elements:
■
■
■
Multiplier stage
Input and output registers
Input and output interfaces
December 2011 Altera Corporation
Cyclone III Device Handbook
Volume 1
ALTERA [ ALTERA CORPORATION ]
