Board Layout
Since spread spectrum affects the m counter values, all spread-spectrum
PLL outputs are effected. Therefore, if only one spread-spectrum signal is
needed, the clock signal should use a separate PLL without other outputs
from that PLL.
No special considerations are needed when using spread spectrum with
the clock switchover feature. This is because the clock switchover feature
does not affect the m and n counter values, which are the counter values
switching when using spread spectrum.
The enhanced and fast PLL circuits in Stratix II and Stratix II GX devices
contain analog components embedded in a digital device. These analog
components have separate power and ground pins to minimize noise
generated by the digital components. Stratix II and Stratix II GX
enhanced and fast PLLs use separate VCC and ground pins to isolate
circuitry and improve noise resistance.
Board Layout
VCCA and GNDA
Each enhanced and fast PLL uses separate VCC and ground pin pairs for
their analog circuitry. The analog circuit power and ground pin for each
PLL is called VCCA_PLL<PLL number> and GNDA_PLL<PLL number>.
Connect the VCCA power pin to a 1.2-V power supply, even if you do not
use the PLL. Isolate the power connected to VCCA from the power to the
rest of the Stratix II or Stratix II GX device or any other digital device on
the board. You can use one of three different methods of isolating the
VCCA pin: separate VCCA power planes, a partitioned VCCA island within
the VCCINT plane, and thick VCCA traces.
Separate VCCA Power Plane
A mixed signal system is already partitioned into analog and digital
sections, each with its own power planes on the board. To isolate the VCCA
pin using a separate VCCA power plane, connect the VCCA pin to the
analog 1.2-V power plane.
Partitioned VCCA Island Within VCCINT Plane
Fully digital systems do not have a separate analog power plane on the
board. Since it is expensive to add new planes to the board, you can create
islands for VCCA_PLL. Figure 1–35 shows an example board layout with
an analog power island. The dielectric boundary that creates the island
should be 25 mils thick. Figure 1–36 shows a partitioned plane within
VCCINT for VCCA
.
1–56
Altera Corporation
July 2009
Stratix II Device Handbook, Volume 2
ALTERA [ ALTERA CORPORATION ]
