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CLK12P 参数 Datasheet PDF下载

CLK12P图片预览
型号: CLK12P
PDF下载: 下载PDF文件 查看货源
内容描述: 的Stratix II器件手册,卷1 [Stratix II Device Handbook, Volume 1]
分类和应用:
文件页数/大小: 768 页 / 5210 K
品牌: ALTERA [ ALTERA CORPORATION ]
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PLLs in Stratix II and Stratix II GX Devices  
Table 1–11 shows the physical pins and their purpose for the fast PLLs.  
For inclkport connections to pins, see “Clocking” on page 1–62.  
Table 1–11. Fast PLL Pins (Part 1 of 2)  
Pin  
CLK0p/n  
Note (1)  
Description  
Single-ended or differential pins that can drive the inclkport for PLLs 1, 2, 7 or 8.  
Single-ended or differential pins that can drive the inclkport for PLLs 1, 2, 7 or 8.  
Single-ended or differential pins that can drive the inclkport for PLLs 1, 2, 7 or 8.  
Single-ended or differential pins that can drive the inclkport for PLLs 1, 2, 7 or 8.  
Single-ended or differential pins that can drive the inclkport for PLLs 3, 4, 9 or 10.  
Single-ended or differential pins that can drive the inclkport for PLLs 3, 4, 9 or 10.  
Single-ended or differential pins that can drive the inclkport for PLLs 3, 4, 9 or 10.  
Single-ended or differential pins that can drive the inclkport for PLLs 3, 4, 9 or 10.  
Single-ended or differential pins that can drive the inclkport for PLL 7.  
CLK1p/n  
CLK2p/n  
CLK3p/n  
CLK8p/n  
CLK9p/n  
CLK10p/n  
CLK11p/n  
FPLL7CLKp/n  
FPLL8CLKp/n  
FPLL9CLKp/n  
FPLL10CLKp/n  
PLL_ENA  
Single-ended or differential pins that can drive the inclkport for PLL 8.  
Single-ended or differential pins that can drive the inclkport for PLL 9.  
Single-ended or differential pins that can drive the inclkport for PLL 10.  
Dedicated input pin that drives the pllenaport of all or a set of PLLs. If you do not use  
this pin, connect it to GND.  
Digital power for PLLs. You must connect this pin to 1.2 V, even if the PLL is not used.  
Analog power for PLL 1. You must connect this pin to 1.2 V, even if the PLL is not used.  
Analog ground for PLL 1. Your can connect this pin to the GND plane on the board.  
Analog power for PLL 2. You must connect this pin to 1.2 V, even if the PLL is not used.  
Analog ground for PLL 2. You can connect this pin to the GND plane on the board.  
Analog power for PLL 3. You must connect this pin to 1.2 V, even if the PLL is not used.  
Analog ground for PLL 3. You can connect this pin to the GND plane on the board.  
Analog power for PLL 4. You must connect this pin to 1.2 V, even if the PLL is not used.  
Analog ground for PLL 4. You can connect this pin to the GND plane on the board.  
Analog ground for PLL 7. You can connect this pin to the GND plane on the board.  
Analog power for PLL 8. You must connect this pin to 1.2 V, even if the PLL is not used.  
Analog ground for PLL 8. You can connect this pin to the GND plane on the board.  
Analog power for PLL 9. You must connect this pin to 1.2 V, even if the PLL is not used.  
Analog ground for PLL 9. You can connect this pin to the GND plane on the board.  
Analog power for PLL 10. You must connect this pin to 1.2 V, even if the PLL is not used.  
VCCD_PLL  
VCCA_PLL1  
GNDA_PLL1  
VCCA_PLL2  
GNDA_PLL2  
VCCA_PLL3  
GNDA_PLL3  
VCCA_PLL4  
GNDA_PLL4  
GNDA_PLL7  
VCCA_PLL8  
GNDA_PLL8  
VCCA_PLL9  
GNDA_PLL9  
VCCA_PLL10  
Altera Corporation  
July 2009  
1–19  
Stratix II Device Handbook, Volume 2  
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