Timing Model
Table 5–73. Stratix II I/O Input Delay for Column Pins (Part 3 of 3)
Minimum Timing
-3Speed -3Speed
-4Speed -5Speed
I/O Standard
Parameter
Grade
Grade
(3)
Unit
Grade
Grade
Industrial Commercial
(2)
1.2-V HSTL
tPI
645
379
677
398
1194
758
1252
795
-
-
-
-
ps
ps
tPCOUT
Notes for Table 5–73:
(1) These I/O standards are only supported on DQS pins.
(2) These numbers apply to -3 speed grade EP2S15, EP2S30, EP2S60, and EP2S90 devices.
(3) These numbers apply to -3 speed grade EP2S130 and EP2S180 devices.
Table 5–74. Stratix II I/O Input Delay for Row Pins (Part 1 of 2)
Minimum Timing
-3Speed -3Speed
-4Speed -5Speed
I/O Standard
Parameter
Grade
Grade
(2)
Unit
Grade
Grade
Industrial Commercial
(1)
LVTTL
tPI
715
391
726
402
788
464
792
468
715
391
547
223
547
223
577
253
577
253
602
278
749
410
761
422
827
488
830
491
749
410
573
234
573
234
605
266
605
266
631
292
1287
760
1350
798
1477
873
1723
1018
1704
999
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
ps
tPCOUT
tPI
tPCOUT
tPI
tPCOUT
tPI
tPCOUT
tPI
tPCOUT
tPI
tPCOUT
tPI
2.5 V
1273
746
1335
783
1461
857
1.8 V
1427
900
1497
945
1639
1035
1720
1116
1477
873
1911
1206
2006
1301
1723
1018
1176
471
1.5 V
1498
971
1571
1019
1350
798
LVCMOS
SSTL-2 Class I
SSTL-2 Class II
1287
760
879
921
1008
404
352
369
879
921
1008
404
1176
471
tPCOUT
352
369
SSTL-18 Class I tPI
tPCOUT
SSTL-18 Class II tPI
tPCOUT
tPI
tPCOUT
960
1006
454
1101
497
1285
580
433
960
1006
454
1101
497
1285
580
433
1.5-V HSTL
Class I
1056
529
1107
555
1212
608
1413
708
5–56
Altera Corporation
April 2011
Stratix II Device Handbook, Volume 1
ALTERA [ ALTERA CORPORATION ]
