Timing Model
1
The performance numbers in Table 5–36 are extracted from the
Quartus II software version 5.1 SP1.
Table 5–36. Stratix II Performance Notes (Part 1 of 6)
Note (1)
Resources Used
Performance
-4
-3
-3
TriMatrix
ALUTs Memory
Blocks
-5
Applications
DSP
Speed Speed
Speed Speed Unit
Grade Grade
Blocks Grade Grade
(2)
(3)
LE
16-to-1 multiplexer (4)
32-to-1 multiplexer (4)
16-bit counter
21
38
16
64
0
0
0
0
0
1
0
0
0
0
0
654.87
625.0
523.83
460.4 MHz
519.21 473.26 464.25 384.17 MHz
566.57 538.79 489.23 421.05 MHz
244.31 232.07 209.11 181.38 MHz
500.00 476.19 434.02 373.13 MHz
64-bit counter
TriMatrix Simpledual-portRAM
Memory
M512
block
32 × 18 bit
FIFO 32 x 18 bit
22
0
1
1
0
0
500.00 476.19 434.78 373.13 MHz
540.54 515.46 469.48 401.60 MHz
TriMatrix Simpledual-portRAM
Memory
M4K
block
128 x 36 bit (8)
True dual-port RAM
128 × 18 bit (8)
0
22
0
1
1
1
1
0
0
0
0
540.54 515.46 469.48 401.60 MHz
530.22 499.00 469.48 401.60 MHz
475.28 453.30 413.22 354.10 MHz
475.28 453.30 413.22 354.10 MHz
FIFO
128 × 36 bit
Simpledual-portRAM
128 × 36 bit (9)
True dual-port RAM
0
128 × 18 bit (9)
5–28
Altera Corporation
April 2011
Stratix II Device Handbook, Volume 1
ALTERA [ ALTERA CORPORATION ]
