Operating Conditions
Table 5–14. 3.3-V PCI Specifications (Part 2 of 2)
Symbol
Parameter
Conditions
Minimum
–0.3
Typical
Typical
Maximum Unit
VIL
Low-level input voltage
High-level output voltage
Low-level output voltage
0.3 × VCCIO
V
V
V
VOH
VOL
IOUT = –500 μA
IOUT = 1,500 μA
0.9 × VCCIO
0.1 × VCCIO
Table 5–15. PCI-X Mode 1 Specifications
Symbol
VCCIO
VIH
Parameter
Output supply voltage
High-level input voltage
Low-level input voltage
Input pull-up voltage
Conditions
Minimum
3.0
Maximum Unit
3.6
V
V
V
V
V
V
0.5 × VCCIO
–0.30
VCCIO + 0.5
0.35 × VCCIO
VIL
VIPU
0.7 × VCCIO
0.9 × VCCIO
VOH
High-level output voltage
Low-level output voltage
IOUT = –500 μA
IOUT = 1,500 μA
VOL
0.1 × VCCIO
Table 5–16. SSTL-18 Class I Specifications
Symbol
VCCIO
VREF
Parameter
Conditions
Minimum
1.71
Typical
1.80
Maximum Unit
Output supply voltage
Reference voltage
1.89
0.945
V
V
V
V
V
V
V
V
V
0.855
0.900
VREF
VTT
Termination voltage
VREF – 0.04
VREF + 0.125
VREF + 0.04
V
V
V
V
IH (DC)
IL (DC)
IH (AC)
IL (AC)
High-level DC input voltage
Low-level DC input voltage
High-level AC input voltage
Low-level AC input voltage
High-level output voltage
Low-level output voltage
VREF – 0.125
VREF – 0.25
VTT – 0.475
VREF + 0.25
VTT + 0.475
VOH
VOL
IOH = –6.7 mA (1)
IOL = 6.7 mA (1)
Note to Table 5–16:
(1) This specification is supported across all the programmable drive settings available for this I/O standard as shown
in the Stratix II Architecture chapter in volume 1 of the Stratix II Device Handbook.
5–10
Altera Corporation
April 2011
Stratix II Device Handbook, Volume 1
ALTERA [ ALTERA CORPORATION ]
