Parameters
Your design stops working after the hardware evaluation time expires,
and the following events occur:
■
For the encoder:
●
●
●
The enainput signal is forced low (deasserted)
The dataoutoutput is forced to the k28.5 pattern
The validoutput is forced low (deasserted)
■
For the decoder:
●
●
●
The enainput signal is forced low (deasserted)
The dataoutoutput is forced to all zeros
The validoutput is forced low (deasserted)
f
For more information on OpenCore Plus hardware evaluation, see
“OpenCore Plus Evaluation” on page 1–2 and AN 320: OpenCore Plus
Evaluation of Megafunctions.
Table 3–2 shows the 8B10B Encoder/Decoder function parameters, which
can only be set in the MegaWizard Interface (see “Parameterize” on
page 2–6).
Parameters
Table 3–2. 8B10B Encoder/Decoder Parameters
Parameter
Value
Encoder or Decoder
Mode of operation
Register inputs/outputs
On for a three cycle latency.
Off for a one-cycle latency.
Tables 3–3 and 3–4 show the encoder and decoder signals.
Signals
Table 3–3. Encoder Signals (Part 1 of 2)
Signal Name
Direction
Description
Input
Clock. The input is latched, and the result is output on this clock. There
is a one clock cycle latency between the input and output.
clk
Input
Active low, reset. Asynchronously resets all registers in the MegaCore
function. This signal should be deasserted synchronously to the rising
edge of clk.
reset_n
Input
Input
Command byte indicator. When high, indicates that the input is a
command byte, not a data byte.
kin
ena
Enable encoder signal. When high, indicates that the data currently
present on the dataininput is to be encoded.
3–10
MegaCore Version 7.2
Altera Corporation
October 2007
8B10B Encoder/Decoder MegaCore Function User Guide
ALTERA [ ALTERA CORPORATION ]
