Chapter 2: Device Datasheet for Cyclone V Devices
2–21
Switching Characteristics
Memory Block Specifications
Table 2–25 lists the Cyclone V memory block specifications.
Table 2–25. Memory Block Performance Specifications for Cyclone V Devices—Preliminary (1), (2)
Resources Used
Performance
Memory
Mode
Unit
C6
C7, I7
C8, A7
ALUTs
Memory
Speed Grade Speed Grade Speed Grade
Single port, all supported widths
0
0
1
1
450
380
330
MHz
MHz
Simple dual-port, all supported
widths
450
380
330
MLAB
Simple dual-port with read and
write at the same address
0
1
350
300
250
MHz
ROM, all supported width
0
0
1
1
450
315
380
275
330
240
MHz
MHz
Single-port, all supported widths
Simple dual-port, all supported
widths
0
0
0
1
1
1
315
275
315
275
240
275
240
180
240
MHz
MHz
MHz
Simple dual-port with the
read-during-write option set to
Old Data, all supported widths
M10K
Block
True dual port, all supported
widths
ROM, all supported widths
0
1
315
275
240
MHz
ps
Min Pulse Width (clock high time)
Min Pulse Width (clock low time)
—
—
—
—
1,450
1,000
1,550
1,200
1,650
1,350
ps
Notes to Table 2–25:
(1) To achieve the maximum memory block performance, use a memory block clock that comes through global clock routing from an on-chip PLL
set to 50% output duty cycle. Use the Quartus II software to report timing for this and other memory block clocking schemes.
(2) When you use the error detection cyclical redundancy check (CRC) feature, there is no degradation in fMAX
.
Periphery Performance
This section describes periphery performance and the high-speed I/O and external
memory interface.
I/O performance supports several system interfaces, such as the LVDS high-speed
I/O interface, external memory interface, and the PCI/PCI-X bus interface.
General-purpose I/O standards such as 3.3-, 2.5-, 1.8-, and 1.5-V LVTTL/LVCMOS
are capable of a typical 167 MHz and 1.2 LVCMOS at 100 MHz interfacing frequency
with 10 pF load.
1
Actual achievable frequency depends on design- and system-specific factors. You
must perform HSPICE/IBIS simulations based on your specific design and system
setup to determine the maximum achievable frequency in your system.
February 2012 Altera Corporation
Cyclone V Device Handbook
Volume 1: Device Overview and Datasheet
ALTERA [ ALTERA CORPORATION ]
