欢迎访问ic37.com |
会员登录 免费注册
发布采购

5CSEA2 参数 Datasheet PDF下载

5CSEA2图片预览
型号: 5CSEA2
PDF下载: 下载PDF文件 查看货源
内容描述: 旋风V器件手册 [Cyclone V Device Handbook]
分类和应用:
文件页数/大小: 74 页 / 1776 K
品牌: ALTERA [ ALTERA CORPORATION ]
 浏览型号5CSEA2的Datasheet PDF文件第40页浏览型号5CSEA2的Datasheet PDF文件第41页浏览型号5CSEA2的Datasheet PDF文件第42页浏览型号5CSEA2的Datasheet PDF文件第43页浏览型号5CSEA2的Datasheet PDF文件第45页浏览型号5CSEA2的Datasheet PDF文件第46页浏览型号5CSEA2的Datasheet PDF文件第47页浏览型号5CSEA2的Datasheet PDF文件第48页  
2–14  
Chapter 2: Device Datasheet for Cyclone V Devices  
Switching Characteristics  
Switching Characteristics  
This section provides performance characteristics of Cyclone V core and periphery  
blocks for commercial grade devices.  
These characteristics can be designated as preliminary or final.  
Preliminary characteristics are obtained using simulation results, process data,  
and other known parameters. The title of these tables show the designation as  
“Preliminary.”  
Final numbers are based on actual silicon characterization and testing. The  
numbers reflect the actual performance of the device under worst-case silicon  
process, voltage, and junction temperature conditions. There are no designations  
on finalized tables.  
Transceiver Performance Specifications  
This section describes transceiver performance specifications.  
Table 2–20 lists the Cyclone V GX transceiver specifications.  
Table 2–20. Transceiver Specifications for Cyclone V GX Devices—Preliminary (Part 1 of 3)  
C6  
C7, I7  
C8, A7  
Symbol/  
Description  
Speed Grade  
Speed Grade  
Speed Grade  
Conditions  
Unit  
Min  
Typ  
Max  
Min  
Typ  
Max  
Min  
Typ  
Max  
Reference Clock  
Supported I/O  
Standards  
1.2 V PCML, 1.5 V PCML, 2.5 V PCML, Differential LVPECL (1), HCSL, and LVDS  
Input frequency from  
REFCLKinput pins  
27  
45  
550  
55  
27  
45  
550  
55  
27  
45  
550  
55  
MHz  
%
Duty cycle  
Peak-to-peak  
differential input voltage  
200  
2000  
200  
2000  
200  
2000  
mV  
Spread-spectrum  
modulating clock  
frequency  
PCIe  
PCIe  
30  
33  
30  
33  
30  
33  
kHz  
0 to  
0 to  
0 to  
Spread-spectrum  
downspread  
–0.5%  
–0.5%  
–0.5%  
On-chip termination  
resistors  
100  
100  
100  
Ω
(2)  
(2)  
VICM (AC coupled)  
1.1  
1.1 (2)  
1.1  
V
HCSL I/O  
standard for the  
PCIe reference  
clock  
VICM (DC coupled)  
RREF  
250  
550  
250  
550  
250  
550  
mV  
2000  
1%  
2000  
1%  
2000  
1%  
Ω
Cyclone V Device Handbook  
February 2012 Altera Corporation  
Volume 1: Device Overview and Datasheet  
 复制成功!