MAX 5000 Programmable Logic Device Family Data Sheet
Figure 5. AC Test Conditions
VCC
Power supply transients can affect AC
measurements. Simultaneous transitions
of multiple outputs should be avoided for
accurate measurement. Threshold tests
must not be performed under AC
conditions. Large-amplitude, fast ground-
current transients normally occur as the
device outputs discharge the load
464 Ω
Device
Output
to Test
System
capacitances. When these transients flow
through the parasitic inductance between
the device ground pin and the test system
ground, significant reductions in
250 Ω
C1 (includes JIG
capacitance)
Device input
rise and fall
times < 3 ns
observable noise immunity can result.
All MAX 5000 EPLDs can be programmed on Windows-based PCs with
the MAX+PLUS II Programmer, an Altera Logic Programmer card, the
Master Programming Unit (MPU), and the appropriate device adapter.
The MPU checks continuity to ensure adequate electrical contact between
the adapter and the device.
Device
Programming
For more information, see the Altera Programming Hardware Data Sheet.
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The MAX+PLUS II software can use text- or waveform-format test vectors
created with the MAX+PLUS II Text Editor or Waveform Editor to test a
programmed device. For added design verification, designers can
perform functional testing to compare the functional behavior of a
MAX 5000 EPLD with the simulation results. This feature requires a
device adapter with the “PLM-” prefix.
Data I/O, BP Microsystems, and other programming hardware
manufacturers also offer programming support for Altera devices.
For more information, see Programming Hardware Manufacturers.
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MAX 5000 devices in 100-pin QFP packages are shipped in special plastic
carriers to protect the QFP leads. Each carrier can be used with a
prototype development socket and programming hardware available
from Altera or third-party programming manufacturers such as Data I/O
and BP Microsystems. This carrier technology makes it possible to
program, test, erase, and reprogram devices without exposing the leads to
mechanical stress.
QFP Carrier &
Development
Socket
For detailed information and carrier dimensions, refer to the QFP Carrier
& Development Socket Data Sheet and Application Note 71 (Guidelines for
Handling J-Lead & QFP Devices).
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