Intel® MAX® 10 FPGA Device Datasheet
M10-DATASHEET | 2017.12.15
Table 12.
Bus Hold Parameters for Intel MAX 10 Devices
Parameter
Condition
VCCIO (V)
Unit
1.2
1.5
1.8
2.5
3.0
3.3
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Min
Max
Bus-hold low, sustaining
current
VIN > VIL
(maximum)
8
—
12
—
30
—
50
—
70
—
70
—
µA
µA
µA
µA
V
Bus-hold high, sustaining
current
VIN < VIH
(minimum)
–8
—
—
–12
—
—
–30
—
—
–50
—
—
–70
—
—
500
–500
2
–70
—
—
500
–500
2
Bus-hold low, overdrive
current
0 V < VIN
VCCIO
<
125
–125
0.9
175
200
–200
1.07
300
–300
1.7
Bus-hold high, overdrive
current
0 V < VIN
VCCIO
<
—
—
–175
1.125
—
—
—
—
Bus-hold trip point
—
0.3
0.375
0.68
0.7
0.8
0.8
Series OCT without Calibration Specifications
Table 13. Series OCT without Calibration Specifications for Intel MAX 10 Devices
This table shows the variation of on-chip termination (OCT) without calibration across process, voltage, and temperature (PVT).
Description
VCCIO (V)
Resistance Tolerance
–C7, –I6, –I7, –A6, –A7
Unit
–C8
±30
±30
±35
±40
±50
±60
Series OCT without calibration
3.00
2.50
1.80
1.50
1.35
1.20
±35
±35
±40
±40
±40
±45
%
%
%
%
%
%
Intel® MAX® 10 FPGA Device Datasheet
11
ALTERA [ ALTERA CORPORATION ]
