AS7C4096A
®
Write cycle (over the operating range)9
–10
–12
–15
–20
Parameter
Write cycle time
Symbol Min
Max
Min
Max
Min
Max
Min
Max Unit Notes
t
t
t
10
7
–
12
–
15
–
20
–
–
–
–
–
–
–
–
–
–
9
–
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
WC
CW
AW
–
–
–
–
–
–
–
–
–
5
–
8
8
–
–
–
–
–
–
–
–
–
6
–
10
10
0
–
–
–
–
–
–
–
–
–
7
–
12
12
0
Chip enable (CE) to write end
Address setup to write end
Address setup time
7
t
0
0
AS
t
t
7
8
10
15
0
12
20
0
Write pulse width (OE = high)
Write pulse width (OE = low
Address hold from end of write
Write recovery time
WP1
WP2
10
0
12
0
t
t
AH
0
0
0
0
WR
DW
t
5
6
7
9
Data valid to write end
t
0
0
0
0
3,4
3,4
3,4
Data hold time
DH
t
t
2
2
2
2
Write enable to output in high Z
Output active from write end
WZ
3
3
3
3
OW
Write waveform 1 (WE controlled)9
tWC
tWR
tAH
tAW
Address
tWP
WE
tAS
tDW
Data valid
tDH
DIN
tWZ
tOW
DOUT
5/27/05, v. 1.1
Alliance Semiconductor
P. 5 of 10
ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
