欢迎访问ic37.com |
会员登录 免费注册
发布采购

AS7C4096A-10TIN 参数 Datasheet PDF下载

AS7C4096A-10TIN图片预览
型号: AS7C4096A-10TIN
PDF下载: 下载PDF文件 查看货源
内容描述: 5.0V 512K ×8 CMOS SRAM [5.0V 512K x 8 CMOS SRAM]
分类和应用: 静态存储器
文件页数/大小: 10 页 / 325 K
品牌: ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
 浏览型号AS7C4096A-10TIN的Datasheet PDF文件第1页浏览型号AS7C4096A-10TIN的Datasheet PDF文件第2页浏览型号AS7C4096A-10TIN的Datasheet PDF文件第3页浏览型号AS7C4096A-10TIN的Datasheet PDF文件第5页浏览型号AS7C4096A-10TIN的Datasheet PDF文件第6页浏览型号AS7C4096A-10TIN的Datasheet PDF文件第7页浏览型号AS7C4096A-10TIN的Datasheet PDF文件第8页浏览型号AS7C4096A-10TIN的Datasheet PDF文件第9页  
AS7C4096A  
®
Read cycle (over the operating range)2,8  
–10  
–12  
–15  
–20  
Parameter  
Read cycle time  
Symbol Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max Unit Notes  
t
t
10  
3
3
0
0
12  
15  
20  
20  
20  
6
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
RC  
10  
10  
5
3
3
0
0
12  
12  
6
3
3
0
0
15  
15  
6
3
3
0
0
2
2
Address access time  
AA  
t
Chip enable (CE) access time  
Output enable (OE) access time  
Output hold from address change  
CE Low to output in low Z  
CE High to output in high Z  
OE Low to output in low Z  
OE High to output in high Z  
Power up time  
ACE  
t
OE  
t
4
OH  
t
3,4  
3,4  
3,4  
3,4  
3,4  
3,4  
CLZ  
t
5
6
7
9
CHZ  
t
OLZ  
OHZ  
t
5
6
7
9
t
PU  
t
10  
12  
15  
20  
Power down time  
PD  
Key to switching waveforms  
Rising input  
Falling input  
Undefined/don’t care  
Read waveform 1 (address controlled)2,5,6,8  
tRC  
Address  
tAA  
tOH  
DOUT  
Data valid  
Read waveform 2 (CE, OE controlled)2,5,7,8  
tRC1  
CE  
tOE  
OE  
tOLZ  
tOHZ  
tCHZ  
tACE  
DOUT  
Data valid  
tCLZ  
tPD  
50%  
ICC  
ISB  
tPU  
Supply  
current  
50%  
5/27/05, v. 1.1  
Alliance Semiconductor  
P. 4 of 10