AS7C3513B
®
Read waveform 2 (CE, OE, UB, LB controlled)3,6,8,9
tRC
Address
tAA
OE
tOE
tOH
tOLZ
CE
tOHZ
tHZ
tACE
tLZ
LB, UB
tBA
tBHZ
tBLZ
Data OUT
Data valid
Write cycle (over the operating range)11
-10
-12
-15
-20
Parameter
Write cycle time
Symbol
Min Max Min Max Min Max
Min
20
12
12
0
Max
–
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
t
t
t
10
8
–
–
–
–
–
–
–
–
–
12
9
–
–
–
–
–
–
–
–
–
15
10
10
0
–
–
–
–
–
–
–
–
–
WC
CW
AW
Chip enable (CE) to write end
Address setup to write end
Address setup time
–
8
9
–
t
0
0
–
AS
WP
WR
Write pulse width
t
7
8
9
12
0
–
Write recovery time
t
0
0
0
–
Address hold from end of write
Data valid to write end
Data hold time
t
0
0
0
0
–
AH
t
5
6
8
10
0
–
DW
t
0
0
0
–
5
DH
WZ
OW
Write enable to output in high
Z
t
–
5
–
6
–
7
–
8
ns
4 , 5
4 , 5
Output active from write end
Byte select low to end of write
t
1
7
–
–
1
8
–
–
1
9
–
–
2
9
–
–
ns
ns
t
BW
3/24/04, v.1.2
Alliance Semiconductor
P. 5 of 10
ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
