AS6YB51216
&
ꢀꢁꢂꢁꢇꢁꢄ ꢆ
Read waveform 2 (CS1, CS2, OE, UB, LB controlled)
t
RC
Address
t
AA
OE
t
OE
t
t
OH
OLZ
CS1
t
OHZ
t
ACS
t
t
HZ
LZ
CS
2
LB, UB
t
t
BHZ
BA
t
BLZ
D
Data valid
OUT
ꢈꢈ
Write cycle (over the operating range)
–70/85
Parameter
Write cycle time
Symbol
tWC
tCW
tAW
tAS
Min
70/85
60/70
60/70
0
Max
–
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
12
Chip enable to write end
Address setup to write end
Address setup time
–
–
–
12
Write pulse width
tWP
tWR
tAH
50/60
0
–
Write recovery time
–
Address hold from end of write
Data valid to write end
Data hold time
0
–
tDW
tDH
30/35
0
–
–
4, 5
4, 5
4, 5
Write enable to output in high Z
Output active from write end
UB/LB low to end of write
tWZ
tOW
tBW
–
20
–
5
60/70
–
11/1/01; V.0.9.8
Alliance Semiconductor
P. 5 of 11
ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
