AS4C256M16D3
Mode Register MR3
The Mode Register MR3 controls Multi-purpose registers. The Mode Register 3 is written by asserting low on
CS#, RAS#, CAS#, WE#, high on BA1 and BA0, and low on BA2 while controlling the states of address pins
according to the table below
Table 8. Extended Mode Register EMR (3) Bitmap
BA2 BA1 BA0 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 Address Field
0*1
1
1
0*1
MPR MPR Loc Mode Register (3)
MPR location
BA1 BA0 MRS mode
A2
MPR
A1 A0
0
0
1
1
0
1
0
1
MR0
MR1
MR2
MR3
0
1
Normal operation *3
Dataflow from MPR
0
0
1
1
0
1
0
1
Predefined pattern *2
RFU
RFU
RFU
Note 1:
Note 2:
Note 3:
BA2, A3 - A14 are RFU and must be programmed to 0 during MRS.
The predefined pattern will be used for read synchronization.
When MPR control is set for normal operation (MR3 A[2] = 0) then MR3 A[1:0] will be ignored.
Confidential
20
Rev. 3.0
Aug. /2014
ALSC [ ALLIANCE SEMICONDUCTOR CORPORATION ]
