5800AND 5801
BiMOS II
LATCHED DRIVERS
ELECTRICAL CHARACTERISTICS at T = +25°C, V
= 5 V (unless otherwise noted).
DD
A
Limits
Characteristic
Symbol
Test Conditions
= 50 V, T = +25°C
Min.
—
Typ. Max.
Units
µA
µA
V
Output Leakage Current
I
V
V
—
—
50
100
1.1
1.3
1.6
1.0
—
CEX
CE
A
= 50 V, T = +70°C
—
CE
A
Collector-Emitter
Saturation Voltage
V
I
I
I
= 100 mA
= 200 mA
= 350 mA, V
—
0.9
1.1
1.3
—
CE(SAT)
C
C
C
—
V
= 7.0 V
—
V
DD
Input Voltage
V
V
—
V
IN(0)
V
V
V
V
V
V
V
V
V
V
V
V
V
= 12 V
= 10 V
10.5
8.5
3.5
50
50
50
—
—
V
IN(1)
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
—
—
V
= 5.0 V (See Note)
= 12 V
—
—
V
Input Resistance
Supply Current
r
200
300
600
1.0
0.9
0.7
—
—
kΩ
kΩ
kΩ
mA
mA
mA
µA
µA
µA
µA
V
IN
= 10 V
—
= 5.0 V
—
I
= 12 V, Outputs Open
= 10 V, Outputs Open
= 5.0 V, Outputs Open
= 12 V, Outputs Open, Inputs = 0 V
= 5.0 V, Outputs Open, Inputs = 0 V
2.0
1.7
1.0
200
100
50
DD(ON)
(Each
Stage)
—
—
I
—
DD(OFF)
(Total)
—
50
Clamp Diode
Leakage Current
I
= 50 V, T = +25°C
—
—
R
R
R
A
= 50 V, T = +70°C
—
—
100
2.0
A
Clamp Diode Forward Voltage
V
I = 350 mA
—
1.7
F
F
NOTE: Operation of these devices with standard TTL or DTL may require the use of appropriate pull-up resistors to ensure a minimum logic “1”.
25
24
23
22
21
OUT
IN
5
6
7
8
1
1
IN
OUT
OUT
OUT
2
3
2
3
IN
UCN5801EP
(additional pinout diagrams
are on next page)
IN
4
4
OUT
OUT
OUT
9
IN
IN
5
6
7
5
6
20
19
10
11
IN
7
Dwg. PP-037
ALLEGRO [ ALLEGRO MICROSYSTEMS ]
