3958
DMOS FULL-BRIDGE
PWM MOTOR DRIVER
Terminal List
A3958SLB A3958SB
Terminal Name Terminal Description
(SOIC)
1
(DIP)
CP
Reservoir capacitor (typically 0.22 µF)
The charge pump capacitor (typically 0.22 µF)
Logic input for direction control (see also D15)
Logic-level oscillator (square wave) input
Grounds
24
CP1 & CP2
PHASE
OSC
2 & 3
4
1 & 2
3
4
5
GROUND
6, 7
8
5, 6, 7, 8*
9
LOGIC SUPPLY VDD, the low voltage (typically 5 V) supply
ENABLE
DATA
Logic input for enable control (see also D14)
Logic-level input for serial interface
9
10
10
11
CLOCK
Logic input for serial port (data is entered on rising edge)
Logic input for serial port (active on rising edge)
VREF, the load current reference input volt. (see also D16)
Logic input for PWM mode control (see also D17)
No (Internal) Connection
11
12
STROBE
REF
12
13
13
14
MODE
14
15
NO CONNECT
OUTA
15
—
One of two DMOS bridge outputs to the motor
Sense resistor
16
16
SENSE
17
17
GROUND
LOAD SUPPLY
OUTB
Grounds
18, 19
20
18, 19*
20
VBB, the high-current, 20 V to 50 V, motor supply
One of two DMOS bridge outputs to the motor
No (Internal) connection
21
21
NO CONNECT
RANGE
22
—
Logic Input for VREF range control (see also D16)
Regulator decoupling capacitor (typically 0.22 µF)
23
22
VREG
24
23
* For the A3958SB DIP only, there is an indeterminate resistance between the substrate grounds (pins 6, 7, 18,
and 19) and the grounds at pins 5 and 8. Pins 5 and 8, and 6, 7, 18, or 19 must be connected together externally.
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