3958
DMOS FULL-BRIDGE
PWM MOTOR DRIVER
ELECTRICAL CHARACTERISTICS at TA = +25°C, VBB = 50 V, VDD = 5.0 V, VSENSE = 0.5 V,
fPWM < 50 kHz (unless noted otherwise), continued.
Limits
Characteristics
Symbol Test Conditions
Min. Typ. Max. Units
Control Logic
Buffer Input Offset Volt.
Reference Divider Ratio
VIO
–
0
15
mV
–
–
D14 = High
9.9
10 10.2
D14 = Low
4.95 5.0 5.05
–
Propagation Delay Times
tpd
PWM change to source ON
PWM change to source OFF
PWM change to sink ON
PWM change to sink OFF
Phase change to sink ON
Phase change to sink OFF
Phase change to source ON
Phase change to source OFF
–
–
–
–
–
–
–
–
–
–
600
100
600
100
600
100
600
100
165
15
–
–
–
–
–
–
–
–
–
–
ns
ns
ns
ns
ns
ns
ns
ns
°C
°C
V
Thermal Shutdown Temp.
TJ
Thermal Shutdown Hysteresis
∆TJ
UVLO
Enable
ThresholdUVLO Increasing
V
3.90 4.2 4.45
DD
UVLO Hysteresis
∆UVLO
0.05 0.10
–
V
Logic Supply Current
IDD
fPWM < 50 kHz
Sleep Mode, Inputs < 0.5 V
NOTES: 1. Typical Data is for design information only.
–
–
6.0
–
10
2.0
mA
mA
2. Negative current is defined as coming out of (sourcing) the specified device terminal.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
4
ALLEGRO [ ALLEGRO MICROSYSTEMS ]
