[ASAHI KASEI]
[AK7740ET]
(5) Switching characteristics
5-1) System clock
(AVDD=DVDD=3.0V~3.6V,Ta=-10~70°C,CL=20pF)
Parameter
Symbol
Min
Typ
Max
Unit
Master clock (XTI)
a) With crystal oscillator
384fs: frequency
512fs: frequency
b) With external clock:
Duty factor (≤18.432MHz)
(>18.432MHz)
fMCLK
fMCLK
12.288
16.384
18.432
24.576
19
25
MHz
MHz
40
45
50
50
24.576
60
55
25
%
:Frequency
fMCLK
tMCLKH
tMCLKL
tCR
10.0
MHz
ns
: High level width
: Low level width
Clock rise time
16
16
ns
6
6
ns
Clock fall time
tCF
ns
fs
32
48
1
50
kHz
fs
LRCLK sampling frequency
Slave mode :clock rise time
Slave mode :clock fall time
tLR
tLF
6
6
ns
ns
fBCLK
tBCLKH
tBCLKL
tBR
48
150
150
64
fs
ns
ns
ns
ns
BITCLK
Note 1)
Slave mode: High level width
Slave mode: Low level width
Slave mode :clock rise time
Slave mode :clock fall time
6
6
tBF
Note 1) 48fs mode can only be applied in slave mode.
5-2) Reset
(AVDD=DVDD=3.0V~3.6V,Ta=-10~70°C,CL=20pF)
Parameter
INIT_RESET
S_RESET
Symbol
min
150
typ
max
Unit
ns
tRST
Note 1)
tRST
150
ns
Note 1) “L” is acceptable when power is turned on, but ”H” requires a stable master clock input.
<Pre-E-01>
- 11 -
2006/10
AKM [ ASAHI KASEI MICROSYSTEMS ]
