[AK5358A]
SWITCHING CHARACTERISTICS
(Ta=-20°C
∼
85°C; VA=4.5
∼
5.5V; VD=2.7
∼
5.5V; C
L
=20pF)
Parameter
Symbol
min
Master Clock Timing
2.048
fCLK
512fs, 256fs Frequency
16
tCLKL
Pulse Width Low
16
tCLKH
Pulse Width High
3.072
fCLK
768fs, 384fs Frequency
10.5
tCLKL
Pulse Width Low
10.5
tCLKH
Pulse Width High
LRCK Frequency
fs
8
Duty Cycle
Slave mode
45
Master mode
Audio Interface Timing
Slave mode
160
tSCK
SCLK Period
65
tSCKL
SCLK Pulse Width Low
65
tSCKH
Pulse Width High
30
tLRSH
LRCK Edge to SCLK “↑”
30
tSHLR
SCLK “↑” to LRCK Edge
2
tLRS
LRCK to SDTO (MSB) (Except I S mode)
tSSD
SCLK “↓” to SDTO
Master mode
fSCK
SCLK Frequency
dSCK
SCLK Duty
−20
tMSLR
SCLK “↓” to LRCK
−20
tSSD
SCLK “↓” to SDTO
Reset Timing
tPD
150
PDN Pulse Width
tPDV
PDN “↑” to SDTO valid at Slave Mode (Note 14)
tPDV
PDN “↑” to SDTO valid at Master Mode (Note 14)
Note 12. SCLK rising edge must not occur at the same time as LRCK edge.
Note 13. The AK5358A can be reset by bringing the PDN pin = “L”.
Note 14. This cycle is the number of LRCK rising edges from the PDN pin = “H”.
typ
max
24.576
Units
MHz
ns
ns
MHz
ns
ns
kHz
%
%
36.864
96
55
50
35
35
64fs
50
20
35
ns
ns
ns
ns
ns
ns
ns
Hz
%
ns
ns
ns
1/fs
1/fs
4132
4129
MS0511-E-01
-8-
2007/04
AKM [ ASAHI KASEI MICROSYSTEMS ]
