[AK4675]
Addr Register Name
D7
0
RD
0
D6
0
RD
0
D5
0
RD
0
D4
SDOD
R/W
0
D3
MSBS
R/W
0
D2
BCKP
R/W
0
D1
DIF1
R/W
1
D0
DIF0
R/W
0
03H
Format Select
R/W
Default
DIF1-0: Audio Interface Format (Table 16)
Default: “10” (Left jutified)
BCKP: BICK Polarity at DSP Mode (Table 17)
“0”: SDTO is output by the rising edge (“↑”) of BICK and SDTI is latched by the falling edge (“↓”). (default)
“1”: SDTO is output by the falling edge (“↓”) of BICK and SDTI is latched by the rising edge (“↑”).
MSBS: LRCK Phase at DSP Mode (Table 17)
“0”: The rising edge (“↑”) of LRCK is half clock of BICK before the channel change. (default)
“1”: The rising edge (“↑”) of LRCK is one clock of BICK before the channel change.
SDOD: SDTO Disable (Table 47)
“0”: Enable (default)
“1”: Disable (“L”)
Addr Register Name
D7
MDIF4
R/W
0
D6
MDIF3
R/W
0
D5
MDIF2
R/W
0
D4
MDIF1
R/W
0
D3
INR1
R/W
0
D2
INR0
R/W
0
D1
INL1
R/W
0
D0
INL0
R/W
0
04H
MIC Signal Select
R/W
Default
INL1-0: MIC-Amp Lch Input Source Select (Table 18)
Default: “00” (LIN1)
INR1-0: MIC-Amp Rch Input Source Select (Table 18)
Default: “00” (RIN1)
MDIF1: Line1 Input Type Select
0: Single-ended input (LIN1/RIN1 pins: default)
1: Full-differential input (IN1+/IN1− pins)
MDIF2: Line2 Input Type Select
0: Single-ended input (LIN2/RIN2 pins: default)
1: Full-differential input (IN2+/IN2− pins)
MDIF3: Line3 Input Type Select
0: Single-ended input (LIN3/RIN3 pins: default)
1: Full-differential input (IN3+/IN3− pins)
MDIF4: Line4 Input Type Select
0: Single-ended input (LIN4/RIN4 pins: default)
1: Full-differential input (IN4+/IN4− pins)
MS0963-E-00
2008/05
- 144 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
