[AK4675]
■ Headphone-Amp (HPL/HPR pins)
Power supply voltage for headphone amplifiers is applied from PVDDA and PVEE pins. The PVEE pin outputs the
negative voltage generated by the internal charge pump circuit. The headphone amplifier is single-ended outputs and
centered on 0V (VSS3A). Therefore, the capacitor for AC-coupling can be removed. The minimum load resistance is
16Ω. When the input signal level is 0.7Vrms, the output voltage is 0.69Vrms (= 30mW @ 16Ω) at HPGA4-0 bits = 0dB
and HPG bit = 0dB. HPGA3-0 and HPG bits control the output level of headphone-amp. HPGA4-0 bits can control from
+12dB to –50dB by 2dB step and HPG bit can control 0dB or +6dB. The volume is common to L/R channels. When the
volume is changed, pop noise may occur.
HPGA4-0 bits
GAIN (dB)
Step
1FH
1EH
:
+12
+10
-
1AH
19H
18H
17H
16H
:
+2
0
−2
−4
−6
:
(default)
2dB
2H
1H
0H
−46
−48
−50
Table 77. Headphone-Amp Volume Setting
Mixing & Selector
HP Volume
HP-Amp
Input Volume
Input
(0dB)
(+1.94dB)
(HPGA=0dB)
(-1.94dB @ Vol =0dB)
Figure 81. Headphone-Amp Path Level Diagram
MS0963-E-00
2008/05
- 109 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
