[AK4646]
DAFIL
PMADL PMADR PMDAC
LOOP
Figure 24 SW
Mode
Recording Mode
bit
1
1
0
0
x
1
1
0
bit
1
0
1
0
x
1
0
1
bit
x
x
x
1
1
1
1
1
bit
0
0
0
0
1
0
0
0
bit
0
0
0
0
0
1
1
SW1
SW2
Figure
Figure 25
1
1
1
0
0
1
1
1
0
0
0
1
1
1
1
1
Playback Mode
Figure 26
Figure 27
Loop Through
Mode
1
(x: Don’t Care)
Table 21. Recording Playback Mode
LPF bit, HPF bit, FIL3 bit, EQ0 bit, EQ1 bit, EQ2 bit, EQ3 bit, EQ4 bit, EQ5 bit, ACL1 bit and ALC2 bit should be “0”
when selecting those modes.
2nd Order
HPF
1st Order
LPF
Stereo
Separation
Gain
Compensation
5 Band
EQ
ALC
(Volume)
ADC
DAC
SMUTE
DATT
Figure 25. Path at Recording Mode (default)
1st Order
HPF
ADC
DAC
“0” Data
5 Band
Gain
Stereo
1st Order
1st Order
ALC
(Volume)
SMUTE DATT
Compensation
Separation
EQ
LPF
HPF
Figure 26. Path at Playback Mode
2nd Order
HPF
1st Order
LPF
Stereo
Separation
Gain
Compensation
5 Band
EQ
ALC
(Volume)
ADC
DAC
SMUTE
DATT
Figure 27. Path at Loop Through Mode
MS0557-E-05
2011/01
- 33 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
