ASAHI KASEI
[AK4644]
<Analog Mixing Circuit for Receiver Output>
When AIN3 bit = “0”, DACL, MINL, LINL2 and RINR2 bits controls each path switch.
MIN path mixing gain is +6dB(typ)@LOVL bit = “0” when the external input resistance is 20kΩ.
LIN2, RIN2 and DAC pathes mixing gain is 0dB(typ)@LOVL bit = “0”.
LINL2 bit
LIN2 pin
RIN2 pin
MIN pin
0dB
0dB
+6dB
0dB
0dB
RINR2 bit
MINL bit
DACL bit
DACL bit
M
I
RCP/N pin
X
DAC Lch
DAC Rch
Figure 53. Receiver Mixing Circuit (AIN3 bit = “0”, LOVL bit = “0”)
When AIN3 bit = “1”, DACL, LINL2, RINR2, LINL3, RINR3, MICL3 and MICR3 bits controls each path switch. All
pathes mixing gain is 0dB(typ)@LOVL bit = “0”.
LINL2 bit
LIN2 pin
LIN3 pin
0dB
0dB
MICL3 bit
LINL3 bit
*These blocks are not
available at PLL mode.
LIN1 pin
RIN2 pin
MIC-Amp Lch
RINR2 bit
0dB
M
I
MICR3 bit
RINR3 bit
0dB
RCP/N pin
RIN3 pin
RIN1 pin
X
*These blocks are not
available at PLL mode.
MIC-Amp Rch
DACL bit
0dB
DAC Lch
DAC Rch
DACL bit
0dB
Figure 54. Receiver Mixing Circuit (AIN3 bit = “1”, LOVL bit = “0”)
MS0477-E-01
2006/10
- 58 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
