ASAHI KASEI
[AK4644]
Mono Reveiver Output (RCP/RCN pins)
When RCV bit = “1”, LOUT/ROUT pins become RCP/RCN pins, respectively. Lch/Rch signal of DAC or
LIN2/RIN2/LIN3/RIN3 is output from the RCP/RCN pins which is BTL as (L+R)/2 signal. The load impedance is 32Ω
(min). When the PMLO bit = “0”, the mono receiver output enters power-down mode and the output is Hi-Z. When the
PMLO bit is “1” and LOPS bit is “1”, mono receiver output enters power-save mode. Pop noise at power-up/down can be
reduced by changing PMLO bit at LOPS bit = “0”. When PMLO bit = “1” and LOPS bit = “0”, mono receiver output
enters in normal operation. LOVL bit set the gain of mono receiver output.
“DACL”
“LOVL”
RCP pin
RCN pin
DAC
Figure 51. Mono Receiver Output
LOVL
Gain
+6dB
+8dB
Output Voltage (typ)
0.59 x AVDD @−6dBFS
0.59 x AVDD @−8dBFS
0
1
Default
Table 49. Mono Receiver Output Volume Setting
PMLO
0
LOPS
Mode
Power-down
Power-save
RCP
Hi-Z
Hi-Z
RCN
Hi-Z
VCOM/2
x
1
0
Default
1
Normal Operation
Normal Operation Normal Operation
Table 50. Receiver-Amp Mode Setting (x: Don’t care)
PMLO bit
LOPS bit
RCP pin
RCN pin
Hi-Z
Hi-Z
VCOM
>1ms
VCOM
>0
Hi-Z
Hi-Z
Figure 52. Power-up/Power-down Timing for Receiver-Amp
MS0477-E-01
2006/10
- 57 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
