ASAHI KASEI
[AK4527B]
Parameter
Symbol
min
typ
max
Units
Control Interface Timing (3-wire Serial mode):
CCLK Period
tCCK
tCCKL
tCCKH
tCDS
tCDH
tCSW
tCSS
tCSH
tR1
200
80
80
40
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CCLK Pulse Width Low
Pulse Width High
CDTI Setup Time
CDTI Hold Time
CSN “H” Time
CSN “↓” to CCLK “↑”
CCLK “↑” to CSN “↑”
Rise Time of CSN
Fall Time of CSN
Rise Time of CCLK
40
0.025*1/fs
50
50
20
20
20
20
tF1
tR2
tF2
Fall Time of CCLK
Control Interface Timing (I2C Bus mode):
SCL Clock Frequency
fSCL
tBUF
-
4.7
4.0
4.7
4.0
4.7
0
0.25
-
-
100
-
-
-
-
-
-
-
kHz
µs
µs
µs
µs
µs
µs
µs
µs
µs
µs
ns
Bus Free Time Between Transmissions
Start Condition Hold Time (prior to first clock pulse)
Clock Low Time
Clock High Time
Setup Time for Repeated Start Condition
tHD:STA
tLOW
tHIGH
tSU:STA
tHD:DAT
tSU:DAT
tR
SDA Hold Time from SCL Falling
SDA Setup Time from SCL Rising
Rise Time of Both SDA and SCL Lines
Fall Time of Both SDA and SCL Lines
Setup Time for Stop Condition
(Note 20)
1.0
0.3
-
tF
tSU:STO
tSP
4.0
0
Pulse Width of Spike Noise Suppressed by Input Filter
50
Power-down & Reset Timing
PDN Pulse Width
PDN “↑” to SDTO valid
(Note 21)
(Note 22)
tPD
tPDV
150
ns
1/fs
522
Notes: 20. Data must be held for sufficient time to bridge the 300 ns transition time of SCL.
21. The AK4527B can be reset by bringing PDN “L” to “H” upon power-up.
22. These cycles are the number of LRCK rising from PDN rising.
23. I2C is a registered trademark of Philips Semiconductors.
Purchase of Asahi Kasei Microsystems Co., Ltd I2C components conveys a license under the Philips
I2C patent to use the components in the I2C system, provided the system conform to the I2C
specifications defined by Philips.
MS0056-E-00
2000/10
- 11 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
