[AK4438]
2. Auto Setting Mode (ACKS bit = “1”)
MCLK frequency and the sampling speed are detected automatically (Table 4) and DFS2-0 bits are
ignored. The MCLK frequency corresponding to each sampling speed should be provided externally
(Table 5, Table 6).
MCLK
Sampling Speed Mode
Normal Speed Mode
Double Speed Mode
Quad Speed Mode
Oct Speed Mode
512fs/256fs 768fs/384fs
256fs
128fs
64fs
384fs
192fs
96fs
32fs
48fs
Hex Speed Mode
Table 4. Sampling Speed (Auto Setting Mode)
LRCK
fs
8.0kHz
MCLK(MHz)
Sampling
Speed
32fs
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
48fs
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
64fs
N/A
96fs
N/A
N/A
N/A
44.1kHz
48.0kHz
88.2kHz
96.0kHz
176.4kHz
192.0kHz
384.0kHz
768.0kHz
Normal
N/A
N/A
N/A
N/A
Double
Quad
N/A
N/A
N/A
N/A
N/A
N/A
24.576
N/A
36.864
N/A
Oct
Hex
24.576 36.864
Table 5. System Clock Example (Auto Setting Mode)
LRCK
fs
8.0kHz
MCLK(MHz)
Sampling
Speed
128fs
N/A
192fs
N/A
256fs
2.0480
11.2896
12.2880
22.5792
24.5760
N/A
384fs
3.0720
16.9344
18.4320
33.8688
36.8640
N/A
512fs
4.0960
22.5792
24.5760
N/A
768fs
6.1440
33.8688
36.8640
N/A
N/A
N/A
44.1kHz
48.0kHz
88.2kHz
96.0kHz
176.4kHz
192.0kHz
384.0kHz
768.0kHz
Normal
N/A
N/A
N/A
N/A
Double
Quad
N/A
N/A
N/A
N/A
22.5792 33.8688
24.5760 36.8640
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Oct
Hex
N/A
N/A
N/A
N/A
Table 6. System Clock Example (Auto Setting Mode)
MCLK= 256fs/384fs supports sampling rate of 8kHz~96kHz (Table 7). However, when the sampling rate
is 8kHz~48kHz, DR and S/N will degrade by approximately 3dB as compared to when MCLK=
512fs/768fs.
ACKS bit
MCLK
256fs/384fs/512fs/768fs
256fs/384fs
DR,S/N
108dB
105dB
108dB
L
H
H
512fs/768fs
Table 7. Relationship of DR, S/N and MCLK frequency (fs = 44.1kHz)
016001925-E-00
2016/03
- 23 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
