ASAHI KASEI
[AK4395]
LRCK
fs
MCLK
BICK
64fs
128fs
192fs
256fs
384fs
88.2kHz 11.2896MHz 16.9344MHz 22.5792MHz 33.8688MHz 5.6448MHz
96.0kHz 12.2880MHz 18.4320MHz 24.5760MHz 36.8640MHz 6.1440MHz
Table 4. System clock example (Double Speed Mode @Manual Setting Mode)
LRCK
fs
MCLK
BICK
64fs
128fs
192fs
176.4kHz 22.5792MHz 33.8688MHz 11.2896MHz
192.0kHz 24.5760MHz 36.8640MHz 12.2880MHz
Table 5. System clock example (Quad Speed Mode @Manual Setting Mode)
MCLK
Sampling Speed
Normal
512fs
256fs
128fs
768fs
384fs
192fs
Double
Quad
Table 6. Sampling Speed (Auto Setting Mode)
LRCK
fs
MCLK (MHz)
Sampling Speed
128fs
192fs
256fs
384fs
512fs
768fs
32.0kHz
44.1kHz
48.0kHz
88.2kHz
96.0kHz
176.4kHz
192.0kHz
-
-
-
-
-
-
-
-
-
-
-
-
-
-
16.3840
22.5792
24.5760
24.5760
33.8688
36.8640
Normal
22.5792
24.5760
33.8688
36.8640
-
-
-
-
-
-
-
-
Double
Quad
-
-
22.5792
24.5760
33.8688
36.8640
-
-
-
-
Table 7. System clock example (Auto Setting Mode)
n
Audio Serial Interface Format
Data is shifted in via the SDATA pin using BICK and LRCK inputs. Five data formats are supported and selected by the
DIF0-2 as shown in Table 8. In all formats the serial data is MSB-first, 2's compliment format and is latched on the rising
edge of BICK. Mode 2 can be used for 20 and 16 MSB justified formats by zeroing the unused LSBs.
Mode
DIF2
DIF1
DIF0
Mode
BICK
≥32fs
≥40fs
≥48fs
≥48fs
≥48fs
Figure
0
1
2
3
4
0
0
0
0
1
0
0
1
1
0
0
1
0
1
0
0: 16bit LSB Justified
1: 20bit LSB Justified
2: 24bit MSB Justified
3: I2S Compatible
Figure 1
Figure 2
Figure 3
Figure 4
Figure 2
4: 24bit LSB Justified
Table 8. Audio Data Formats
MS0040-E-00
2000/7
- 12 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
