ASAHI KASEI
No. Pin Name
[AK4367]
PIN/FUNCTION
I/O
Function
SDA
CDTI
SCL
CCLK
CAD0
CSN
SDATA
I/O Control Data Input/Output Pin (I2C pin = “H”)
1
I
I
I
I
I
I
Control Data Input Pin (I2C pin = “L”)
Control Data Clock Pin (I2C pin = “H”)
Control Data Clock Pin (I2C pin = “L”)
Chip Address 0 Select Pin (I2C pin = “H”)
Control Data Chip Select Pin (I2C pin = “L”)
Audio Serial Data Input Pin
2
3
4
5
L/R Clock Pin
LRCK
I
This clock determines which audio channel is currently being input on SDATA pin.
Serial Bit Clock Pin
This clock is used to latch audio data.
Master Clock Input Pin
6
7
BICK
I
I
MCLK
Power-down & Reset Pin
8
PDN
I
When at “L”, the AK4367 is in power-down mode and is held in reset.
The AK4367 should always be reset upon power-up.
Control Mode Select Pin (Internal Pull-down Pin)
“H”: I2C Bus, “L”: 3-wire Serial
9
I2C
I
10 MOUT
11 VCOM
O
Mono Analog Output Pin
Common Voltage Output Pin
Normally connected to VSS pin with 0.1µF ceramic capacitor in parallel with a 2.2µF
electrolytic capacitor.
O
Mute Time Constant Control Pin
Connected to VSS pin with a capacitor for mute time constant.
12 MUTET
O
13 VDD
14 VSS
15 HVDD
16 HPR
17 HPL
18 MIN
19 RIN
20 LIN
-
-
-
O
O
I
Power Supply Pin
Ground Pin
Power Supply Pin for Headphone Amp
Rch Headphone Amp Output Pin
Lch Headphone Amp Output Pin
Mono Analog Input Pin
Rch Analog Input Pin
Lch Analog Input Pin
I
I
Note: All digital input pins except analog input pins (MIN, RIN and LIN) and internal pull-down pin must not be left
floating.
Handling of Unused Pin
The unused I/O pins should be processed appropriately as below.
Classification
Analog
Digital
Pin Name
Setting
MOUT, MUTET, HPR, HPL, MIN, RIN, LIN
CAD0
These pins should be open.
These pins should be connected to VSS.
MS0247-E-02
2005/10
- 4 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
