ASAHI KASEI
[AK4348]
OPERATION OVERVIEW
System Clock
The external clocks required to operate the AK4348 are MCLK, LRCK and BICK. The master clock (MCLK) should be
synchronized with LRCK but the phase is not critical. The MCLK is used to operate the digital interpolation filter and the
delta-sigma modulator. There are two methods to set MCLK frequency. In Manual Setting Mode (ACKS bit = “0”:
Register 00H), the sampling speed is set by DFS0-1 bits (Table 1). The frequency of MCLK at each sampling speed is set
automatically. (Table 2~Table 4) In Auto Setting Mode (ACKS bit = “1”: Default), the MCLK frequency is detected
automatically (Table 5), and the internal master clock is set to the appropriate frequency (Table 6) and it is not necessary
to set DFS0-1.
In parallel control mode, the sampling speed can be set by only the ACKS pin. When ACKS pin = “L”, the AK4348
operates bynormal speed mode. When ACKS pin = “H”, auto setting mode is enabled. The parallel control mode does not
support 128fs and 192fs of double speed mode.
All external clocks (MCLK, BICK and LRCK) should be present whenever the AK4348 is in normal operation mode
(RSTB pin = “H”). If these clocks are not provided, the AK4348 may draw excess current and will not operate properly
because it utilizes these clocks for internal dynamic refresh of registers. The AK4348 should be reset by setting RSTB pin
= “L” after threse clocks are provided. If the external clocks are not present, the AK4348 should be in the power-down
mode (RSTB pin = ”L”). After exiting reset(RSTB = “ ”) at power-up, the AK4348 is in the power-down mode until
↑
MCLK is input.
DFS1
DFS0
Sampling Rate (fs)
Default
0
0
1
0
1
0
Normal Speed Mode
8kHz~48kHz
60kHz~96kHz
120kHz~192kHz
Double Speed Mode
Quad Speed Mode
Table 1. Sampling Speed (Manual Setting Mode)
LRCK
fs
MCLK
512fs
BICK
64fs
8.1920MHz 12.2880MHz 16.3840MHz 24.5760MHz 36.8640MHz 2.0480MHz
256fs
384fs
768fs
1152fs
32.0kHz
44.1kHz 11.2896MHz 16.9344MHz 22.5792MHz 33.8688MHz
48.0kHz 12.2880MHz 18.4320MHz 24.5760MHz 36.8640MHz
N/A
N/A
2.8224MHz
3.0720MHz
Table 2. System Clock Example (Normal Speed Mode @Manual Setting Mode)
LRCK
fs
MCLK
BICK
64fs
128fs
192fs
256fs
384fs
88.2kHz 106896MHz 16.9344MHz 22.5792MHz 33.8688MHz 5.6448MHz
96.0kHz 12.2880MHz 18.4320MHz 24.5760MHz 36.8640MHz 6.1440MHz
Table 3. System Clock Example (Double Speed Mode @Manual Setting Mode)
LRCK
fs
MCLK
BICK
64fs
128fs
192fs
176.4kHz 22.5792MHz 33.8688MHz 106896MHz
192.0kHz 24.5760MHz 36.8640MHz 12.2880MHz
Table 4. System Clock Example (Quad Speed Mode @Manual Setting Mode)
MS0532-E-00
2006/07
- 10 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
