ASAHI KASEI
[AK4140]
Status Change Handling
The INT1/0 pin goes “H” when one of following three statuses changes without masking. Each change of status can be
masked by MPLT bit, MSP bit and MNS bit. When masked, the interrupt event does not affect the operation of the INT1/0
pin (the masks do not affect the status registers). When the PDN pin= “L” or RSTN= “0”, the INT pin goes to “L”.
1. PILOT bit : PILOT detection
Goes “1” when the Pilot signal is detected.
2. SAP bit
: SAP detection
Goes “1” when the SAP signal is detected.
3. NOISE bit
: Noise detection
Goes “1” when the noise is detected.
Once INT1/0 pin goes to “H”, it remains “H” for the hold time controlled by the INT11-10, INT01-00 bits.
INT01 bit
INT00 bit
INT0 pin Hold time
1LRCK cycle
0
0
1
1
0
1
0
1
1024 LRCK cycle
4096 LRCK cycle
Holds “H” until the status register is read.
Table 20. INT0 pin Hold Time Control
INT11 bit
INT10 bit
INT1 pin Hold time
0
0
1
1
0
1
0
1
1LRCK cycle
1024 LRCK cycle
4096 LRCK cycle
Holds “H” until the status register is read.
Table 21. INT1 pin Hold Time Control
Event
(PILOT, SAP or NOISE bit)
Hold Time
INT1/0 pin
Hold Time
Internal Counter Initialized
Figure 14. INT pin Timing
MS0547-E-01
2007/03
- 29 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
