ASAHI KASEI
[AK4140]
Mode
Operation
Status
Output
Lch
PILOT
SAP
NOISE
Rch
in Table 14
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
L+R
L+R
SAP
SAP*
L+R
L+R
SAP
SAP*
SAP
SAP*
SAP
SAP*
SAP
SAP*
SAP
SAP*
L+R
L+R
L+R
L+R
L+R
L+R
L+R
L+R
L+R
L+R
SAP
SAP*
L+R
L+R
SAP
SAP*
SAP
SAP*
SAP
SAP*
SAP
SAP*
SAP
SAP*
SAP
SAP*
SAP
SAP*
SAP
Mono
⇔
SAP
⇔
SAP*
Auto
28
29
30
SAP
⇔
SAP*
Auto
Mono/SAP
⇔
Mono/SAP*
Auto
SAP*
SAP
SAP*
: These status bits are not reflected to the output data.
SAP*: -7dB attenuated.
Table 15 Output Control
Output Lch/Rch Swapping Operation
When the LRR bit is “1”, the output data is swapped between Lch and Rch. When the LR bit is “0”, the output data is as
Table 15.
LR bit
Mode
Normal
Swap
Operation
0
1
Output Lch/Rch data as Table 15
Swap Lch/Rch data as Table 15
Table 16. Output Channel Control
MS0547-E-01
2007/03
- 25 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
