[AK4129]
256 OBICK
1/ 8FSO
OLRCK(O)
OBICK(O) (256FSO)
SDTO 1 (O)
23 22
0
23 22
0
23 22
0
23 22
0
23 22
0
23 22
0
23 22
L1
R1
L2
R2
L3
R3
32OBICK
32OBICK 32OBICK 32OBICK
32OBICK 32OBICK
Figure 28. TDM 256 mode 24bit MSB justified Timing at Master Mode. (SDTO2-3: “L” outputs)
256 OBICK
min. 1/ 256FSO
OLRCK(I)
OBICK(I) (256FSO)
SDTO 1 (O)
23 22
0
23 22
0
23 22
0
23 22
0
23 22
0
23 22
0
23 22
L1
R1
L2
R2
L3
R3
32 OBICK 32 OBICK 32 OBICK 32 OBICK 32 OBICK 32 OBICK
Figure 29. TDM 256 mode 24bit MSB justified Timing at Slave Mode. (SDTO2-3: “L” outputs)
256 OBICK
1/8FSO
OLRCK(O)
OBICK (O: 256FSO)
SDTO 1 (O)
23
0
23
0
23
0
23
0
23
0
23
0
23
L1
R1
L2
R2
L3
R3
32 OBICK 32 OBICK 32 OBICK 32 OBICK 32 OBICK 32 OBICK
Figure 30. TDM 256 mode 24bit I2S Compatible Timing at Master Mode (SDTO2-3: “L” outputs)
256 OBICK
min. 1/ 256FSO
OLRCK(I)
OBICK ( I: 256FSO)
SDTO 1 (O)
23
0
23
0
23
0
23
0
23
0
23
0
23
L1
R1
L2
R2
L3
R3
32 OBICK 32 OBICK 32 OBICK 32 OBICK 32 OBICK 32 OBICK
Figure 31. TDM 256 mode 24bit I2S Compatible Timing at Slave Mode (SDTO2-3: “L” outputs)
MS1173-E-01
2010/09
- 29 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
