[AK4129]
OLRCK
0
1
8
9
10 11 12 13 14 15 16 17
20 21 22 23
29 30 31
0
1
8
9
10 11 12 13 14 15 16 17
20 21 22 23
29 30 31 0 1 2
OBICK(64fs)
SDTO(O)
15 14
17 16 15 14
11 10
11 10
11 10
11 10
9
9
9
9
8
8
8
8
2
2
2
2
1
1
1
1
0
0
0
0
15 14
11 10
11 10
11 10
11 10
9
9
9
9
8
8
8
8
2
2
2
2
1
1
1
1
0
0
0
0
15:MSB, 0:LSB
17:MSB, 0:LSB
19:MSB, 0:LSB
17 16 15 14
SDTO(O)
SDTO(O)
SDTO(O)
19 18 17 16 15 14
19 18 17 16 15 14
23 22 21 20 19 18 17 16 15 14
23:MSB, 0:LSB
23 22 21 20 19 18 17 16 15 14
Lch Data
Rch Data
Figure 25. Stereo Mode LSB justified Timing
OLRCK
0
1
2
3
4
13 14 15 16 17 18 19 20 21 22 23 24
31 0
1
2
3
4
13 14 15 16 17 18 19 20 21 22 23 24
31 0
1
2
OBICK(64fs)
SDTO(O)
15 14 13 12
17 16 15 14
19 18 17 16
23 22 21 20
2
1
0
15 14 13 12
17 16 15 14
19 18 17 16
23 22 21 20
2
4
6
1
3
5
0
2
4
8
15 14
17 16
19 18
23 22
15:MSB, 0:LSB
4
3
2
1
0
1
3
7
0
2
6
SDTO(O)
SDTO(O)
SDTO(O)
17:MSB, 0:LSB
6
5
4
3
2
1
5
0
4
1
5
0
4
19:MSB, 0:LSB
10 9
23:MSB, 0:LSB
8
7
6
3
2
1
0
10 9
3 2 1 0
Lch Data
Rch Data
Figure 26. Stereo Mode MSB Justified Timing
OLRCK
0
1
2
3
4
14 15 16 17 18 19 20 21 22 23 24
0
1
2
3
4
14 15 16 17 18 19 20 21 22 23 24
31 0 1 2
OBICK(64fs)
SDTO(O)
15 14 13 12
17 16 15 14
19 18 17 16
23 22 21 20
2
1
0
15 14 13 12
17 16 15 14
19 18 17 16
23 22 21 20
2
4
6
1
3
5
0
2
4
8
15
15:MSB, 0:LSB
4
3
2
1
0
1
3
7
0
2
6
17
19
23
SDTO(O)
SDTO(O)
SDTO(O)
17:MSB, 0:LSB
6
5
4
3
2
1
5
0
4
1
5
0
4
19:MSB, 0:LSB
10 9
23:MSB, 0:LSB
8
7
6
3
2
1
0
10 9
3 2 1 0
Lch Data
Rch Data
Figure 27. Stereo Mode I2S Compatible Timing
Note: SDTO is identified as SDTO1, SDTO2 and SDTO3.
MS1173-E-01
2010/09
- 28 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
