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AK4101A 参数 Datasheet PDF下载

AK4101A图片预览
型号: AK4101A
PDF下载: 下载PDF文件 查看货源
内容描述: QUAD产出192KHZ 24位DIT [QUAD OUTPUTS 192KHZ 24 BIT DIT]
分类和应用: 输出元件
文件页数/大小: 29 页 / 317 K
品牌: AKM [ ASAHI KASEI MICROSYSTEMS ]
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ASAHI KASEI  
[AK4101A]  
n Serial Control Interface  
In asynchronous mode, four of the dual function pins become CSN, CCLK, CDTI and CDTO, a 4 wire microprocessor  
interface. The internal 66 byte control register can then be read and written. The contents of the control register define,  
in part, the mode of operation for the AK4101A. Figure 19 illustrates the serial data flow associated with SCI read and  
write operations. C1-0 bits are the chip address. The AK4101A looks for C1-0 bits to be a “11” before responding to the  
incoming data. R/W is the Read/Write bit which is “0” for a read operation and “1” for a write operation. The register  
address contained in A7-0 bits is decoded to select a particular byte of the control register. D7-0 bits on CDTI pin is the  
control data coming from the microprocessor during a write operation. D7-0 bits on CDTO pin is the contents of the  
addressed byte from the control register requested during a read operation. The address and data bits are framed by CSN  
pin = “0”. During a write operation, each address and data bit is sampled on the rising edge of CCLK. During a read  
operation, the address bits are sampled on the rising edge of CCLK while data on CDTO is output on the falling edge of  
CCLK. CCLK has a maximum frequency of 5 MHz.  
CSN  
8
9
10 11 12 13 14 15  
0
1
2
3
4
5
6
7
16 17 18 19 20 21 22 23  
CCLK  
CDTI  
CDTO  
CDTI  
C1 C0  
*
*
*
*
*
R/W A7 A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0  
WRITE  
READ  
Hi-Z (with pull-down resistor)  
“L”  
C1 C0  
*
*
*
*
*
R/W A7 A6 A5 A4 A3 A2 A1 A0 
Hi-Z (with pull-down resistor)  
Hi-Z  
CDTO  
D7 D6 D5 D4 D3 D2 D1 D0  
C1-C0: Chip Address (Fixed to “11”)  
R/W: READ/WRITE (0:READ, 1:WRITE)  
*: Don’t care  
A7-A0: Register Address  
D7-D0: Control Data  
Figure 19. Control I/F Timing  
AK4101A  
mP  
CSN  
CCLK  
CDTI  
CSN1  
CCLK  
CDTI  
CDTO  
CDTO  
CSN2  
AK4101A  
CSN  
CCLK  
CDTI  
CDTO  
Figure 20. Typical connection with mP  
Note:External pull-up resistor should not be attached to CDTO pins  
since CDTO pin is internally connected to the pull-down resistor.  
MS0250-E-00  
2003/07  
- 21 -  
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