[AK1542A]
13. Power-up Sequence
1. Power-up Sequence (Recommended)
PVDD,CPVDD
PDN1
T> 0
50s
1.8V
On-chip LDO
0V
(1.8V)
Refin
Don’t care
input
Internal resiter values are set
Registers can be written
Write the data in all
Write to the register
addresses of the register
PDN2(PLL)
HiZ
CP
Output
Fig. 12 Recommended Power Sequence
Note 1) The initial register values are not defined. Therefore, even after [PDN1] is set to “High”, each bit value remains
undefined. In order to set all register values, it is required to write the data in all addresses of the register.
MS1399-E-00
2012/3
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