[AK09916]
8.4. I
2
C Bus Interface
I
2
C bus interface is compliant with Standard mode and Fast mode. Standard/Fast mode is selected
automatically by fSCL.
Standard mode
fSCL ≤ 100kHz
Symbol
fSCL
tHIGH
tLOW
tR
tF
tHD:STA
tSU:STA
tHD:DAT
tSU:DAT
tSU:STO
tBUF
Parameter
SCL clock frequency
SCL clock “High” time
SCL clock “Low” time
SDA and SCL rise time
SDA and SCL fall time
Start Condition hold time
Start Condition setup time
SDA hold time (vs. SCL falling edge)
SDA setup time (vs. SCL rising edge)
Stop Condition setup time
Bus free time
Min.
4.0
4.7
1.0
0.3
4.0
4.7
0
250
4.0
4.7
Typ.
Max.
100
Unit
kHz
s
s
s
s
s
s
s
ns
s
s
Fast mode
100kHz ≤ fSCL ≤ 400kHz
Symbol
fSCL
tHIGH
tLOW
tR
tF
tHD:STA
tSU:STA
tHD:DAT
tSU:DAT
tSU:STO
tBUF
tSP
Parameter
SCL clock frequency
SCL clock “High” time
SCL clock “Low” time
SDA and SCL rise time
SDA and SCL fall time
Start Condition hold time
Start Condition setup time
SDA hold time (vs. SCL falling edge)
SDA setup time (vs. SCL rising edge)
Stop Condition setup time
Bus free time
Noise suppression pulse width
Min.
0.6
1.3
0.3
0.3
0.6
0.6
0
100
0.6
1.3
50
Typ.
Max.
400
Unit
kHz
s
s
s
s
s
s
s
ns
s
s
ns
[I
2
C bus interface timing]
1/fSCL
VIH
SCL
VIL
VIH
SDA
VIL
tBUF
tLOW
tR
tHIGH
tF
tSP
VIH
SCL
VIL
tHD:STA
Stop
Start
tHD:DAT
tSU:DAT
tSU:STA
Start
tSU:STO
Stop
015007392-E-02
-7-
2015/12
AKM [ ASAHI KASEI MICROSYSTEMS ]
