[AK09915]
8.5. I2C Bus Interface
CSB pin = “H”
I2C bus interface is compliant with Standard mode, Fast mode and High-speed mode (Hs-mode).
Standard/Fast/Hs-mode is selected automatically by fSCL.
Standard mode
fSCL≤100kHz
Symbol
fSCL
tHIGH
tLOW
tR
Parameter
Min.
Typ.
Max.
Unit
SCL clock frequency
SCL clock “High” time
SCL clock “Low” time
SDA and SCL rise time
SDA and SCL fall time
Start Condition hold time
Start Condition setup time
100
kHz
µs
µs
µs
µs
µs
µs
µs
ns
4.0
4.7
1.0
0.3
tF
tHD:STA
tSU:STA
4.0
4.7
0
250
4.0
4.7
tHD:DAT SDA hold time (vs. SCL falling edge)
tSU:DAT SDA setup time (vs. SCL rising edge)
tSU:STO
tBUF
Stop Condition setup time
Bus free time
µs
µs
Fast mode
100kHz≤fSCL≤400kHz
Symbol
fSCL
tHIGH
tLOW
tR
Parameter
Min.
Typ.
Max.
Unit
kHz
µs
µs
µs
µs
µs
µs
µs
SCL clock frequency
SCL clock “High” time
SCL clock “Low” time
SDA and SCL rise time
SDA and SCL fall time
Start Condition hold time
Start Condition setup time
400
0.6
1.3
0.3
0.3
tF
tHD:STA
tSU:STA
tHD:DAT
tSU:DAT
tSU:STO
tBUF
0.6
0.6
0
100
0.6
1.3
SDA hold time (vs. SCL falling edge)
SDA setup time (vs. SCL rising edge)
Stop Condition setup time
ns
µs
µs
Bus free time
tSP
Noise suppression pulse width
50
ns
[I2C bus interface timing]
1/fSCL
VIH2
SCL
VIL2
VIH2
SDA
SCL
VIL2
tLOW tR
tHIGH
tBUF
tF
tSP
VIH2
VIL2
tHD:STA
Stop Start
tHD:DAT
tSU:DAT tSU:STA
Start
tSU:STO
Stop
015006484-E-02
2016/7
- 10 -
AKM [ ASAHI KASEI MICROSYSTEMS ]
