ATF-35143 Absolute Maximum Ratings
[1]
Symbol
V
DS
V
GS
V
GD
I
DS
P
diss
P
in max
T
CH
T
STG
θ
jc
Parameter
Drain - Source Voltage
[2]
Gate - Source Voltage
[2]
Gate Drain Voltage
[2]
Drain Current
[2]
Total Power Dissipation
[4]
RF Input Power
Channel Temperature
Storage Temperature
Thermal Resistance
[5]
Units
V
V
V
mA
mW
dBm
°C
°C
°C/W
Absolute
Maximum
5.5
-5
-5
I
dss[3]
300
14
160
-65 to 160
310
Notes:
1. Operation of this device above any one
of these parameters may cause
permanent damage.
2. Assumes DC quiesent conditions.
3. V
GS
= 0 V
4. Source lead temperature is 25°C.
Derate 3.2 mW/
°C
for T
L
> 67°C.
5. Thermal resistance measured using
150°C Liquid Crystal Measurement
method.
Product Consistency Distribution Charts
[7, 8]
120
100
80
+0.6 V
120
100
80
0V
Cpk = 1.73
Std = 0.35
I
DS
(mA)
-3 Std
60
40
+3 Std
60
40
–0.6 V
20
0
0
2
4
V
DS
(V)
6
8
20
0
19
20
21
22
23
24
OIP3 (dBm)
Figure 1. Typical Pulsed I-V Curves
[6]
.
(V
GS
= -0.2 V per step)
200
Cpk = 3.7
Std = 0.03
Figure 2. OIP3 @ 2 GHz, 2 V, 15 mA.
LSL=19.0, Nominal=20.9, USL=23.0
160
Cpk = 2.75
Std = 0.17
160
120
120
-3 Std
+3 Std
80
-3 Std
+3 Std
80
40
40
0
0.2
0.3
0.4
0.5
0.6
0.7
0
16
17
18
GAIN (dB)
19
20
NF (dB)
Figure 3. NF @ 2 GHz, 2 V, 15 mA.
LSL=0.2, Nominal=0.37, USL=0.7
Figure 4. Gain @ 2 GHz, 2 V, 15 mA.
LSL=16.5, Nominal=18.0, USL=19.5
Notes:
6. Under large signal conditions, V
GS
may
swing positive and the drain current may
exceed I
dss
. These conditions are
acceptable as long as the maximum P
diss
and P
in max
ratings are not exceeded.
7. Distribution data sample size is 450
samples taken from 9 different wafers.
Future wafers allocated to this product
may have nominal values anywhere
within the upper and lower spec limits.
8.
Measurements made on production test
board. This circuit represents a trade-off
between an optimal noise match and a
realizeable match based on production test
requirements. Circuit losses have been de-
embedded from actual measurements.
2
AGILENT [ AGILENT TECHNOLOGIES, LTD. ]
