T9000
Preliminary Data Sheet
November 2000
ISDN Network Termination Node (NTN) Device
■ Does not provide control over MON-0 (time slot 2)
because layer-1 transceiver control is done through
the internal microcontroller bus. The downstream
monitor code will be FFh. Downstream A and E bits
for GCI channel 0 will be set to 1. Upstream data in
time slot 2 will be ignored.
10 GCI+ Interface Module (continued)
10.3 GCI-NT Mode (GCCF[GMODE(1:0)] = 00)
(continued)
10.3.1 GCI-SCIT Mode (GCCF, GMODE[1:0] = 01)
■ Does not support external layer-2 devices. This
implies:
Figure 18 shows the frame structure for GCI-SCIT
(Special Circuit Interface-T) mode, also known as GCI-
TE mode. In this mode, the DCL clock rate is automati-
cally set to 1536 kHz, overriding the value defined by
GCCF[GRATE]. In addition, a powerdown mode is
available in which DCL is stopped (see Section 10.5,
GCI+ Powerdown Mode).
— No data transfer is provided over GCI-D channel
(time slot 3, first and second data bits) as the
internal HDLC controller and microcontroller pro-
vide this service. Downstream data during these
2 bits will be set to 1.
— There is no need to support GCI subchannel C/I
control on channel 0 (C/I-0). The downstream C/I
code will be Fh. The upstream C/I code will be
ignored.
The data rate in GCI-SCIT mode is automatically set to
768 kHz, ignoring the value defined by
GCCF[CKMODE]. A total of twelve 8-bit time slots are
contained in each frame comprising three GCI chan-
nels of four time slots each. Time slots 0 and 1 carry
user data, time slot 2 is the GCI monitor (MON) chan-
nel, and time slot 3 is the GCI signaling and control
channel.
— There is no need for terminal IC (TIC) subchannel
control. The downstream TIC code will be Fh. The
upstream TIC code will be ignored.
■ Automatically manages the MON-1 channel’s opera-
tion, maintenance, and data transfer (see Section
10.3.2, Monitor Message Transfer, for more details).
The FS1 output pin provides the frame synchronization
clock (FSC) as defined by the GCI standard. It
becomes active with the rising edge of DCL at the start
of time slot 0 and is turned off one-half of a DCL period
prior to the start of time slot 1.
■ Provides control of the C/I-1 subchannel (see Sec-
tion 10.4, C/I Message Transfer, for more details).
Register GCOF1[OFF1(4:0)] controls the time slots to
which PFS1 and PFS2 are assigned. Table 79 illus-
trates the relationship between the value of
GCOF1[OFF1(4:0)] and the time-slot assignment of the
PFS1 and PFS2 signals. Note that the GCOF2 register
is ignored in GCI-NT mode.
In this mode, the NTN device:
■ May transfer upstream/downstream data on time
slots 0 (B1), 1 (B2), 4 (IC1), and 5 (IC2).
Lucent Technologies Inc.
75
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