T7507 Quad PCM Codec with Filters,
Termination Impedance, and Hybrid Balance
Data Sheet
August 1999
Timing Characteristics (continued)
TIME SLOT
5
tMCHMCL1
MCLK
FSEP
Dx
1
2
3
4
6
7
8
1
tMCH1MCH2
tMCLSPH
tSPHMCL
tMCL2MCL1
tSPLMCL
tSPLMCL
tSPHSPL
tMCHDV1
BIT 2 BIT 3
tMCLDZ
BIT 7
tMCHDV1
BIT 1
BIT 4
BIT 5
BIT 6
BIT 8
tDVMCL
tMCLDV
BIT
1
BIT
2
BIT
3
BIT
4
BIT
5
BIT
6
BIT
7
BIT
8
DR
DR
STABLE
5-3581.g(F)
Figure 12. T7507 Transmit and Receive Timing, FSEP = 1 MCLK or IFS = 1, Delayed Timing (D0 = 0)
TIME SLOT
tMCHMCL1
1
tMCH1MCH2
4
MCLK
FSEP
Dx
2
3
5
6
7
8
1
tMCL2MCL1
tMCLSPH
tSPHMCL
tSPLMCL
tSPLMCL
tSPHSPL
tMCHDZ
tMCHDV1
tMCHDV1
BIT 1
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
BIT 8
tDVMCL
tMCLDV
BIT
1
BIT
2
BIT
3
BIT
4
BIT
5
BIT
6
BIT
7
BIT
8
DR
DR
STABLE
5-3581.h(F)
Figure 13. T7507 Transmit and Receive Timing, FSEP = 1 MCLK or IFS = 1, Nondelayed Timing (D0 = 1)
26
Lucent Technologies Inc.
AGERE [ AGERE SYSTEMS ]
