T7507 Quad PCM Codec with Filters,
Termination Impedance, and Hybrid Balance
Data Sheet
August 1999
Timing Characteristics
Table 25. Clock Section
See Figures 12—14.
Symbol
Parameter
Test Conditions
Min
97
40
0
Typ
—
Max
—
Unit
ns
tMCHMCL1
tCDC
Clock Pulse Width
Duty Cycle, MC
—
—
—
—
60
%
tMCH1MCH2
tMCL2MCL1
Clock Rise and
Fall Time
—
15
ns
Table 26. T7507 Transmit Section (Delayed Timing)
See Figure 12.
Symbol
Parameter
Test Conditions
Min
0
Typ
—
—
—
—
—
—
—
Max
60
Unit
ns
tMCHDV Data Enabled on TS Entry
tMCHDV1 Data Delay from MC
tMCLDZ* Data Float on TS Exit
tSPHMCL Frame-sync Hold Time
tMCLSPH Frame-sync High Setup
tSPLMCL Frame-sync Low Setup
tSPHSPL Frame-sync Pulse Width
0 < CLOAD < 100 pF
0 < CLOAD < 100 pF
0
60
ns
CLOAD = 0
15
50
50
50
0.1
100
—
ns
—
—
—
—
ns
—
ns
—
ns
125 – tMCHMCH
µs
* Timing parameter tMCLDZ is referenced to a high-impedance state.
Table 27. T7507 Transmit Section (Nondelayed Timing)
See Figure 13.
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
tSPHDV
Data Enabled on TS Entry
0 < CLOAD < 100 pF
0
0
—
—
—
—
—
—
—
80
ns
ns
ns
ns
ns
ns
µs
tMCHDV1 Data Delay from FSX
tMCHDZ* Data Float on TS Exit
tSPHMCL Frame-sync Hold Time
tMCLSPH Frame-sync High Setup
tSPLMCL Frame-sync Low Setup
0 < CLOAD < 100 pF
60
CLOAD = 0
0
30
—
—
—
—
50
50
50
0.1
—
—
—
tSPHSPL
Frame-sync Pulse Width
125 – tMCHMCH
* Timing parameter tMCHDZ is referenced to a high-impedance state.
Table 28. T7507 Receive Section
See Figures 12—14.
Symbol
tDVMCL
tMCLDV
tSPHMCL
tSPLMCL
Parameter
Test Conditions
Min
Typ
—
Max
—
Unit
ns
Receive Data Setup
—
—
—
—
30
15
50
50
Receive Data Hold
—
—
ns
Frame Separation Hold Time
Frame Separation Low Setup
—
—
ns
—
—
ns
Lucent Technologies Inc.
25
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