Data Sheet
June 1999
ORCA Series 3C and 3T FPGAs
Programmable Logic Cells (continued)
BRI9
I9
BL09
BR09
BRI9
BLI9
BLI9
BRI8
BRI8
I8
BL08
BR08
BLI8
BLI8
BRI7
BLI7
BRI6
BLI6
BRI5
BLI5
BRI4
BLI4
BRI7
BL07
BR07
I7
BLI7
BRI6
BL06
BR06
I6
BLI6
BRI5
BL05
BR05
I5
BLI5
BRI4
BL04
BR04
I4
BLI4
1
DEC
DEC
HIGH Z
WHEN LOW
TRI
TRI
1
1
1
1
HIGH Z
WHEN LOW
HIGH Z WHEN LOW
1
BRI3
I3
BRI3
BL03
BR03
BL03
BR03
I3
BLI3
BLI3
BRI2
BRI2
I2
BL02
BR02
BL02
BR02
I2
BLI2
BLI2
BRI1
BL01
BR01
BRI1
I1
BL01
BR01
I1
BLI1
BLI1
BRI0
BL00
BR00
BRI0
I0
BL00
I0
BLI0
BR00
BLI0
5-5746(F)
5-5747(F)
Figure 13. Buffer-Buffer-Decoder Mode
Figure 14. Buffer-Decoder-Buffer Mode
Lucent Technologies Inc.
23
AGERE [ AGERE SYSTEMS ]
