Table 7. SFR Memory Mapping
HWin 0 Read HWin 0 Write HWin 1
HWin 151
Address
019H
018H
017H
016H
015H
Stack Pntr (hi) Stack Pntr (hi)
Stack Pntr (lo) Stack Pntr (lo)
Stack Pntr (hi) Stack Pntr (hi)
Stack Pntr (lo) Stack Pntr (lo)
PWM2_CTRL ***
IOS2
IOS1
IOS0
PWM0_CTRL
IOC1
PWM1_CTRL ***
EDAC-CS2
***
IOC0
014H
013H
012H
011H
010H
WSR
WSR
WSR
WSR
INT_MASK1
INT_PEND1
SP_STAT
PORT 2
INT_MASK1
INT_PEND1
SP_CON
PORT 2
INT_MASK1
INT_PEND1
RESERVED
RESERVED
INT_MASK1
INT_PEND1
***
PSW2
Timer 3(hi)2
Timer 3(lo)2
00FH
00EH
00DH
PORT 1
PORT 1
RESERVED
PORT 0
BAUD RATE
Timer 2 (hi)
RESERVED
WDT-SCALE2
IOC3
Timer 2 (hi)
T2CAPTURE (hi)
00CH
00BH
Timer 2 (lo)
Timer 1 (hi)
Timer 2 (lo)
IOC2
T2CAPTURE (lo)
***
INT_PRI(hi)2
INT_PRI(lo)2
INT_PEND
INT_MASK
PTSSRV (hi)
PTSSRV (lo)
PTSSEL (hi)
PTSSEL (lo)
RESERVED
RESERVED
Zero-reg (hi)
Zero_reg (lo)
00AH
Timer 1 (lo)
Watchdog
***
009H
008H
007H
006H
005H
004H
003H
002H
001H
000H
INT_PEND
INT_MASK
SBUF (RX)
HSI_status
INT_PEND
INT_PEND
INT_MASK
***
INT_MASK
SBUF (TX)
HSO_command
HSO_time (hi)
HSO_time (lo)
HSI_mode
***
HSI_time(hi)
HSI_time (lo)
RESERVED
RESERVED
Zero_reg (hi)
Zero_reg (lo)
***
***
***
RESERVED
Zero_reg (hi)
Zero_reg (lo)
RESERVED
Zero_reg (hi)
Zero_reg (lo)
Notes:
1. For some functions that share a register address in HWindow0, the opposite access type (read/write) is available in HWindow 15 if
indicated by the three asterisks (***).
2. These registers are not available in the industry standard 8XC196KD. Therefore, industry standard development software will not recognize these
mnemonics, and you will only be able to access them via their physical addresses.
6
AEROFLEX [ AEROFLEX CIRCUIT TECHNOLOGY ]
