欢迎访问ic37.com |
会员登录 免费注册
发布采购

CT1496-2 参数 Datasheet PDF下载

CT1496-2图片预览
型号: CT1496-2
PDF下载: 下载PDF文件 查看货源
内容描述: CT1496-2 MIL -STD - 1397型E 10MHz的低电平的串行曼彻斯特32位编码器 [CT1496-2 MIL-STD-1397 Type E 10MHz Low Level Serial Manchester 32 Bit Encoder]
分类和应用: 电信集成电路光电二极管编码器
文件页数/大小: 9 页 / 93 K
品牌: AEROFLEX [ AEROFLEX CIRCUIT TECHNOLOGY ]
 浏览型号CT1496-2的Datasheet PDF文件第1页浏览型号CT1496-2的Datasheet PDF文件第2页浏览型号CT1496-2的Datasheet PDF文件第3页浏览型号CT1496-2的Datasheet PDF文件第4页浏览型号CT1496-2的Datasheet PDF文件第5页浏览型号CT1496-2的Datasheet PDF文件第7页浏览型号CT1496-2的Datasheet PDF文件第8页浏览型号CT1496-2的Datasheet PDF文件第9页  
Functional Description and Pinout  
Pin #  
31  
Pin Name  
Function  
VCC  
+5V ± 10ꢀ  
39  
DATA 1/  
DATA 1/  
Manchester Encoder Serial DATA Output (Max Load 40 pF).  
38  
Manchester Encoded Serial DATA Output (Max Load  
40 pF).  
29  
33  
T Inhibit  
Transmit Inhibit Output (Max load 45 pF).  
X
DATAST 1/  
Manchester Encoded Serial DATA Output for purpose of  
self-testing. Connected to decoder self-test input.  
Controlled by Transmit/Self-Test function (max load 50  
pF).  
32  
DATAST 1/  
Manchester Encoded Serial DATA Output for Purpose Of  
Self-Testing. Connected to Decoder Self-test Input.  
Controlled By Transmit / Self-Test Function. (Max Load  
50 pF).  
41  
20  
40 MHz  
40 MHz ± 0.1ꢀ TTL input to encoder. Symmetry 35ꢀ min.  
Rise and fall times 5nSec max.  
Parity Select  
Low Level Input for even parity, high level input for odd  
parity. Parity determined on 34 Bit word (Sync, W1, 32  
Data Bits).  
40  
37  
Encoder Enable  
Asynchronous enable input pulse. Enables transmission  
when a high level signal is input.  
Transmit/ Self-Test  
High level input enables transmission of data thru data and  
data outputs: Disables DATA and DATA outputs; Which  
st  
st  
both go to low logic state. Low level input enables  
transmission of DATA thru DATA and DATA outputs;  
st  
st  
Disables DATA and DATA outputs, which both go to high  
logic state.  
36  
4 Bit SIS/SOS Select High level selects 4 Bit SIS/SOS transmission. This will  
enable 4 Bit inputs to be loaded into the 4 Bit SIS/SOS  
register  
22  
21  
42  
34 Bit Select  
35 Bit Select  
Sys Clr/Load  
High level selects 34 Bit transmission (32 Data Bits, W1 Bit  
and Sync Bit).  
High level selects 35 Bit transmission (32 data Bits, W1 Bit,  
Sync Bit and Parity Bit).  
A low level allows data at input pins to be loaded, clears the  
parity generator and initializes the internal controller. A  
positive going edge latches input data present at that time  
into the data registers.  
6
Aeroflex Circuit Technology  
SCDCT1496 REV A 3/22/00 Plainview NY (516) 694-6700