Power dissipation5,7, 8
Ptotal1
Ptotal2
IDD
CL = 50pF
2.0
1.5
mW/
MHz
VDD from 4.5 to 5.5
Power dissipation5, 7, 8
CL = 50pF
mW/
MHz
VDD from 3.00 to 3.6
Standby Supply Current VDD1 or VDD2
VIN = VDD or VSS
VDD = 5.5
OE=VDD
Pre-Rad 25oC
10
mA
mA
Pre-Rad -55oC to +125oC
Post-Rad 25oC
100
OE=VDD
OE=VDD
500
15
mA
Input capacitance 9
CIN
¦ = 1MHz @ 0V
pF
VDD from 3.00 to 5.5
Output capacitance9
COUT
¦ = 1MHz @ 0V
15
pF
VDD from 3.00 to 5.5
Notes:
1. All specifications valid for radiation dose £ 1E5 rad(Si) per MIL-STD-883, Method 1019.
2. Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: V = V (min) + 20%, - 0%; V = V (max) + 0%,
IH
IH
IL
IL
- 50%, as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input voltage within th e above specified range, but
are guaranteed to V (min) and V (max).
IH
IL
3. All combinations of OEx and DIRx
2
4. Per MIL-PRF-38535, for current density £ 5.0E5 amps/cm , the maximum product of load capacitance (per output buffer) times frequency should not exceed
3,765 pF-MHz.
5. Guaranteed by characterization.
6. Not more than one output may be shorted at a time for maximum duration of one second.
7. Power does not include power contribution of any CMOS output sink current.
8. Power dissipation specified per switching output.
9.Capacitance measured for initial qualification and when design changes may affect the value. Capacitance is measured between the designated terminal and V
SS
at frequency of 1MHz and a signal amplitude of 50mV rms maximum.
10.Guaranteed; tested on a sample of pins per device.
11. Supplied as a design limit, but not guaranteed or tested.
.
6
AEROFLEX [ AEROFLEX CIRCUIT TECHNOLOGY ]
