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OP467GS 参数 Datasheet PDF下载

OP467GS图片预览
型号: OP467GS
PDF下载: 下载PDF文件 查看货源
内容描述: 四路精密,高速运算放大器 [Quad Precision, High Speed Operational Amplifier]
分类和应用: 运算放大器
文件页数/大小: 20 页 / 629 K
品牌: AD [ ANALOG DEVICES ]
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OP467
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter
Supply Voltage
Input Voltage
Differential Input Voltage
Output Short-Circuit Duration
Storage Temperature Range
14-Lead CERDIP and 20-Terminal LCC
14-Lead PDIP and 16-Lead SOIC
Operating Temperature Range
OP467A
OP467G
Junction Temperature Range
14-Lead CERDIP and 20-Terminal LCC
14-Lead PDIP and 16-Lead SOIC
Lead Temperature (Soldering, 60 sec)
1
Rating
±18 V
±18 V
±26 V
Limited
−65°C to +175°C
−65°C to +150°C
−55°C to +125°C
−40°C to +85°C
−65°C to +175°C
−65°C to +150°C
300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θ
JA
is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 5.
Package Type
14-Lead CERDIP (Y)
14-Lead PDIP (P)
16-Lead SOIC (S)
20-Terminal LCC (RC)
1
Absolute maximum ratings apply to both DICE and packaged parts, unless
otherwise noted.
2
For proper operation, the positive supply must be sequenced ON before the
negative supply.
3
For supply voltages less than ±18 V, the absolute maximum input voltage is
equal to the supply voltage.
θ
JA1
94
76
88
78
θ
JC
10
33
23
33
Unit
°C/W
°C/W
°C/W
°C/W
θ
JA
is specified for the worst-case conditions, that is, θ
JA
is specified for device
in socket for CERDIP, PDIP, and LCC packages, and θ
JA
is specified for device
soldered in circuit board for the SOIC package.
DICE CHARACTERISTICS
OUT A
2
1
–IN A
14
OUT D
13 –IN D
+IN A 3
12 +IN D
V+
4
11 V–
+IN B 5
10 +IN C
–IN B
6
7
8
9
–IN C
OUT B
Figure 5. 0.111 Inch × 0.100 Inch DIE Size, 11,100 sq. mils,
Substrate Connected to V+, 165 Transistors
ESD CAUTION
Rev. F | Page 6 of 20
OUT C
00302-005